FGSD12SR6012A datasheet(9/41 Pages) ETC2

Part #	FGSD12SR6012A

Description	3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

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Delivering Next Generation Technology

Series

FGSD12SR6012*A

3-14.4Vdc Input, 12A, 0.45-5.5Vdc Output

Http://www.fdk.com

Ver 1.7 May. 8, 2013

Preliminary Data Sheet

Analog Output Voltage Programming

The output voltage of the module is programmable to

any voltage from 0.6dc to 5.5Vdc by connecting a

resistor between the Trim and SIG_GND pins of the

module.

Certain restrictions apply on the output

voltage set point depending on the input voltage.

These are shown in the Output Voltage vs. Input

Voltage Set Point Area plot in Fig-5.

The Upper

Limit curve shows that for output voltages lower than

1V, the input voltage must be lower than the

maximum of 14.4V. The Lower Limit curve shows

that for output voltages higher than 0.6V, the input

voltage needs to be larger than the minimum of 3V.

Without an external resistor between Trim and

SIG_GND pins, the output of the module will be

0.6Vdc. To calculate the value of the trim resistor,

Rtrim

for a desired output voltage, should be as per

the following equation:

Rtrim is the external resistor in kohm

Vo-req is the desired output voltage

Note that the tolerance of a trim resistor will affect the

tolerance of the output voltage. Standard 1% or 0.5%

resistors may suffice for most applications; however,

a tighter tolerance can be obtained by using two

resistors in series instead of one standard value

resistor.

Table 1 provides RTRIM values required for some

common output voltages.

Table 1: Trim Resistor Value

VO-REG [V]

RTRIM [kΩ]

0.6

Open

0.9

40

1.0

30

1.2

20

1.5

13.33

1.8

10

2.5

6.316

3.3

4.444

5.0

2.727

Digital Output Voltage Adjustment

Please see the Digital Feature Descriptions section.

Remote Sense

The power module has a Remote Sense feature to

minimize the effects of distribution losses by

regulating the voltage between the sense pins (VS+

and VS-). The voltage drop between the sense pins

and the VOUT and GND pins of the module should

not exceed 0.5V.

Analog Voltage Margining

Output voltage margining can be implemented in the

module by connecting a resistor, Rmargin-up, from

the Trim pin to the ground pin for margining-up the

output voltage and by connecting a resistor,

Rmargin-down, from the Trim pin to output pin for

margining-down. Fig-7 shows the circuit configuration

for output voltage margining. The POL Programming

Tool, available at www.fdk.com under the Downloads

section, also calculates the values of Rmargin-up and

]

k

[

0.6)

-

(V

12

R

REQ

-

O

TRIM

Ω



Fig-5: Output Voltage vs. Input Voltage Set

Point Area plot showing limits where the output

voltage can be set for different input voltages.

Fig-6: Output Voltage vs. Input Voltage Set

Point Area plot showing limits where the output

voltage can be set for different input voltages.

Caution – Do not connect SIG_GND to

GND elsewhere in the layout.

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