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SN65HVD255D Datasheet(PDF) 11 Page - Texas Instruments |
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SN65HVD255D Datasheet(HTML) 11 Page - Texas Instruments |
11 / 28 page SN65HVD255 SN65HVD256, SN65HVD257 www.ti.com SLLSEA2C – DECEMBER 2011 – REVISED SEPTEMBER 2013 ELECTRICAL CHARACTERISTICS (continued) Over recommended operating conditions, TA = –40°C to 125°C (unless otherwise noted). SN65HVD256 device VRXD = VCC. PARAMETER TEST CONDITIONS / COMMENT MIN TYP(1) MAX UNIT 8.0 DEVICE SWITCHING CHARACTERISTICS Total loop delay, driver input (TXD) to 8.1 tPROP(LOOP1) receiver output (RXD), recessive to 150 dominant See Figure 13, S = 0 V, RL = 60 Ω, ns CL = 100 pF, CL_RXD = 15 pF Total loop delay, driver input (TXD) to 8.2 tPROP(LOOP2) receiver output (RXD), dominant to 150 recessive Mode change time, from Normal to Silent 8.3 IMODE See Figure 12 20 µS or from Silent to Normal 9.0 DRIVER ELECTRICAL CHARACTERISTICS 9.1 CANH See Figure 3 and Figure 10, TXD = 2.75 4.5 Bus output voltage VO(D) 0 V, S = 0 V, RL = 60 Ω, CL = open, V (dominant 9.2 CANL 0.5 2.25 RCM = open See Figure 3 and Figure 10, TXD = 9.3 VO(R) Bus output voltage (recessive) VCC, VRXD = VCC, S = VCC or 0 V (2), 2 0.5×VCC 3 V RL = open (no load), RCM = open See Figure 3 and Figure 10, TXD = 0 V, S = 0 V, 45 Ω ≤ RL ≤ 65 Ω, CL 9.4 1.5 3 = open, RCM = 330 Ω, –2 V ≤ VCM ≤ 7 V, 4.75 V ≤ VCC ≤ 5.25 V VOD(D) Differential output voltage (dominant) V See Figure 3 and Figure 10, TXD = 0 V, S = 0 V, 45 Ω ≤ RL ≤ 65 Ω, CL 9.5 1.25 3.2 = open, RCM = 330 Ω, –2 V ≤ VCM ≤ 7 V, 4.5V ≤ VCC ≤ 5.5 V See Figure 3 and Figure 10, TXD = 9.6 VCC, S = 0 V, RL = 60 Ω, CL = open, –0.12 0.012 RCM = open VOD(R) Differential output voltage (recessive) V See Figure 3 and Figure 10, TXD = VCC, S = 0 V, RL = open (no load), 9.7 –0.100 0.050 CL = open, RCM = open, –40°C ≤ TA ≤ 85°C Output symmetry (dominant or See Figure 3 and Figure 10, S at 0 recessive) 9.8 VSYM V, RL = 60 Ω, CL = open, RCM = –0.4 0.4 V open (VCC – VO(CANH) – VO(CANL)) See Figure 3 and Figure 15, VCANH 9.9 –160 = 0 V, CANL = open, TXD = 0 V short circuit steady-state output current, IOS(SS)_DOM mA Dominant See Figure 3 and Figure 15, VCANL = 9.10 160 32 V, CANH = open, TXD = 0 V See Figure 3 and Figure 15, –20 V ≤ short circuit steady-state output current, VBUS ≤ 32 V, Where VBUS = CANH = 9.11 IOS(SS)_REC –8 8 mA Recessive CANL, TXD = VCC, Normal and Silent Modes 9.12 CO Output capacitance See receiver input capacitance (2) For the bus output voltage (recessive) will be the same if the device is in normal mode with S pin LOW or if the device is in silent mode with the S pin is HIGH. Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: SN65HVD255 SN65HVD256 SN65HVD257 |
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