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UC2524DW Datasheet(PDF) 4 Page - Texas Instruments

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Part No. UC2524DW
Description  ADVANCED REGULATING PULSE WIDTH MODULATORS
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Maker  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

UC2524DW Datasheet(HTML) 4 Page - Texas Instruments

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PRINCIPLES OF OPERATION
UC1524
UC2524
UC3524
SLUS180E – NOVEMBER 1999 – REVISED OCTOBER 2005
flip-flop, which is synchronously toggled by the
The UC1524 is a fixed-frequency pulse-width-modu-
oscillator output. The oscillator output pulse also
lation voltage regulator control circuit. The regulator
serves as a blanking pulse to assure both outputs are
operates at a frequency that is programmed by one
never on simultaneously during the transition times.
timing resistor (RT), and one timing capacitor (CT), RT
The width of the blanking pulse is controlled by the
establishes a constant charging current for CT. This
valve of CT. The outputs may be applied in a
results in a linear voltage ramp at CT, which is fed to
push-pull configuration in which their frequency is half
the comparator providing linear control of the output
that of the base oscillator Note that for buck regulator
pulse width by the error amplifier. The UC1524
topologies, the two outputs can be wire-ORed for an
contains an on-board 5 V regulator that serves as a
effective
0-90%
duty
cycle
range.
With
this
reference as well as powering the UC1524’s internal
connection, the output frequency is the same as the
control circuitry and is also useful in supplying
oscillator frequency. The output of the error amplifier
external support functions. This reference voltage is
shares a common input to the comparator with the
lowered externally by a resistor divider to provide a
current limiting and shutdown circuitry and can be
reference within the common-mode range of the error
overridden by signals from either of these inputs. This
amplifier or an external reference may be used. The
common point is also available externally and may be
power supply output is sensed by a second resistor
employed to control the gain of, or to compensate,
divider network to generate a feedback signal to the
the error amplifier or to provide additional control to
error amplifier. The amplifier output voltage is then
the regulator.
compared to the linear voltage ramp at CT. The
resulting modulated pulse out of the high-gain
comparator is then steered to the appropriate output
pass transistor (Q1 or Q2) by the pulse-steering
4


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