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AD7564BRS-REEL Datasheet(PDF) 7 Page - Analog Devices |
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AD7564BRS-REEL Datasheet(HTML) 7 Page - Analog Devices |
7 / 17 page AD7564 REV. B –7– PIN DESCRIPTIONS Pin Number Mnemonic Description 1 DGND Digital Ground. 2 IOUT2C IOUT2 terminal for DAC C. This should normally connect to the signal ground of the system. 3 VDD Positive power supply. This is +5 V ± 5%. 4 IOUT1C IOUT1 terminal for DAC C. 5 RFBC Feedback resistor for DAC C. 6 VREFC DAC C reference input. 7 IOUT2D IOUT2 terminal for DAC D. This should normally connect to the signal ground of the system. 8 IOUT1D IOUT1 terminal for DAC D. 9 RFBD Feedback resistor for DAC D. 10 VREFD DAC D reference input. 11 SDOUT This shift register output allows multiple devices to be connected in a daisy chain configuration. 12 CLR Asynchronous CLR input. When this input is taken low, all DAC latches are loaded with all 0s. 13 LDAC Asynchronous LDAC input. When this input is taken low, all DAC latches are simultaneously updated with the contents of the input latches. 14 FSIN Level-triggered control input (active low). This is the frame synchronization signal for the input data. When FSIN goes low, it enables the input shift register, and data is transferred on the falling edges of CLKIN. If the address bits are valid, the 12-bit DAC data is transferred to the appropriate input latch on the sixteenth falling edge after FSIN goes low. 15 SDIN Serial data input. The device accepts a 16-bit word. DB0 and DB1 are DAC select bits. DB2 and DB3 are device address bits. DB4 to DB15 contain the 12-bit data to be loaded to the selected DAC. 16 CLKIN Clock Input. Data is clocked into the input shift register on the falling edges of CLKIN. Add a pull-down resistor on the clock line to avoid timing issues. 17 A1 Device address pin. This input in association with A0 gives the device an address. If DB2 and DB3 of the serial input stream do not correspond to this address, the data which follows is ignored and not loaded to any input latch. However, it will appear at SDOUT irrespective of this. 18 A0 Device address pin. This input in association with A1 gives the device an address. 19 VREFA DAC A reference input. 20 RFBA Feedback resistor for DAC A. 21 IOUT1A IOUT1 terminal for DAC A. 22 IOUT2A IOUT2 terminal for DAC A. This should normally connect to the signal ground of the system. 23 VREFB DAC B reference input. 24 RFBB Feedback resistor for DAC B. 25 IOUT1B IOUT1 terminal for DAC B. 26 N/C No Connect pin. 27 AGND This pin connects to the back gates of the current steering switches. It should be connected to the signal ground of the system. 28 IOUT2B IOUT2 terminal for DAC B. This should normally connect to the signal ground of the system. |
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