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LTC1296 Datasheet(PDF) 13 Page - Linear Technology |
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LTC1296 Datasheet(HTML) 13 Page - Linear Technology |
13 / 28 page 13 LTC1293/LTC1294/LTC1296 129346fs MSB-First/LSB-First (MSBF) The output data of the LTC1293/4/6 is programmed for MSB-first or LSB-first sequence using the MSB bit. When the MSBF bit is a logical one, data will appear on the DOUT line in MSB-first format. Logical zeroes will be filled in indefinitely following the last data bit to accommodate longer word lengths required by some microprocessors. When the MSBF bit is a logical zero, LSB first data will follow the normal MSB first data on the DOUT line. In the bipolar mode the sign bit will fill in after the MSB bit for MSBF = 0 (see Operating Sequence). Power Shutdowns (PS) The power shutdown feature of the LTC1293/4/6 is acti- vated by making the PS bit a logical zero. If CS remains low after the PS bit has been received, a 12-bit DOUT word with Example 2: The same conditions as Example 1 except COM = 1V. The resulting input span is 1V ≤ IN+ ≤ 4V. Note if IN + ≥ 4V the resulting DOUT word is all 1’s. If IN+ ≤ 1V then the resulting DOUT word is all 0’s. Example 3: Let VCC = 5V, V – = –5V, REF+ = 4V, REF– = 1V and COM = 1V. Bipolar mode of operation. The resulting input span is –2V ≤ IN+ ≤ 4V. For differential input configurations with the same condi- tions as in the above three examples the resulting input spans are as follows: Example 1 (Diff.): IN – ≤ IN+ ≤ IN– + 3V. Example 2 (Diff.): IN – ≤ IN+ ≤ IN– + 3V. Example 3 (Diff.): IN – – 3V ≤ IN+ ≤ IN– + 3V. S APPLICATI I FOR ATIO Operating Sequence Example: Differential Inputs (CH4 +, CH5–), Unipolar Mode LTC1293 AI05 MSB-FIRST DATA (MSBF = 0) MSB-FIRST DATA (MSBF = 1) tCYC CS DIN DOUT START SEL1 UNI PS SGL/ DIFF ODD/ SIGN MSBF tCONV tSMPL SEL0 HI-Z FILLED WITH ZEROES DON'T CARE CLK DON'T CARE B0 B1 B11 CLK DON'T CARE tCYC CS DIN START SEL1 UNI PS SGL/ DIFF ODD/ SIGN MSBF SEL0 DON'T CARE DOUT tCONV tSMPL HI-Z B11 B1 B0 B1 B11 FILLED WITH ZEROES |
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