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NM34W02 Datasheet(PDF) 7 Page - Fairchild Semiconductor

Part No. NM34W02
Description  2K-Bit Standard 2-Wire Bus Interface Serial EEPROM with Full Array Write Protect
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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NM34W02 Datasheet(HTML) 7 Page - Fairchild Semiconductor

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NM34W02 Rev. C.2
Device Addressing
Following a start condition the master must output the address of
the slave it is accessing. The most significant four bits of the slave
address are those of the device type identifier (
see Figure 4). This
is fixed as 1010 for all EEPROM devices.
Write Cycle Timing
SDA
SCL
STOP
CONDITION
START
CONDITION
WORD n
8th BIT
ACK
tWR
DS500078-7
SDA
SCL
START
CONDITION
STOP
CONDITION
SDA
SCL
DATA STABLE
DATA
CHANGE
SCL FROM
MASTER
DATA OUTPUT
FROM
TRANSMITTER
DATA OUTPUT
FROM
RECEIVER
18
9
START
ACKNOWLEDGE
DS500078-8
DS500078-9
Data Validity (Figure 1).
Start and Stop Definition (Figure 2).
All IIC EEPROMs use an internal protocol that defines a PAGE
BLOCK size of 2K bits (for Byte addresses 00 through FF).
Acknowledge Responses from Receiver (Figure 3).
DS500078-10


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