Input

+

Filter

GalvanicIsolation

Barrier

Vref

Vref

DataMUX

EN

IN

OSC

+

PWM

ACDetect

OutputBuffer

DCChannel

ACChannel

Filter

PulseWidth

Demodulation

CarrierDetect

OUT

ISO7240A

ISO7241A

ISO7242A

SLLS905E – MAY 2008 – REVISED JANUARY 2010

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

FUNCTION DIAGRAM

INPUT

OUTPUT ENABLE

OUTPUT

(IN)

(EN)

(OUT)

H

H or Open

H

L

H or Open

L

PU

PU

X

L

Z

Open

H or Open

H

PD

PU

X

H or Open

H

PD

PU

X

L

Z

(1)

PU = Powered Up; PD = Powered Down ; X = Irrelevant; H = High Level; L = Low Level

AVAILABLE OPTIONS

SIGNALING

INPUT

CHANNEL

MARKED

ORDERING

PRODUCT

RATE

THRESHOLD

CONFIGURATION

AS

ISO7240ADW (rail)

~1.5 V (TTL)

ISO7240ADW

1 Mbps

4/0

ISO7240A

(CMOS compatible)

ISO7240ADWR (reel)

ISO7241ADW (rail)

~1.5 V (TTL)

ISO7241ADW

1 Mbps

3/1

ISO7241A

(CMOS compatible)

ISO7241ADWR (reel)

ISO7242ADW (rail)

~1.5 V (TTL)

ISO7242ADW

1 Mbps

2/2

ISO7242A

(CMOS compatible)

ISO7242ADWR (reel)

(1)

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

2

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Product Folder Link(s): ISO7240A ISO7241A ISO7242A

Not Recommended for New Designs