R1EX24512BSAS0I/R1EX24512BTAS0I

R10DS0026EJ0400 Rev.4.00

Page 7 of 17

Sep, 20, 2013

Device Address

(A0, A1, A2)

Eight devices can be wired for one common data bus line as maximum. Device address pins are used to distinguish

pin matches corresponding hard-wired device address pins A0 to A2, that one device can be activated.

Pin Connections for A0 to A2

Pin connection

Memory size Max connect number

A2

A1

A0

Note

512k bit

8

1

1

1

Write Protect

(WP)

When the Write Protect pin (WP) is high, the write protection feature is enabled and operates as shown in the following

table. Also, acknowledgment "0" is outputted after inputting device address and memory address. After inputting write

data, acknowledgment "1"(NO ACK) is outputted.

When the WP is low, write operation for all memory arrays are allowed. The read operation is always activated

irrespective of the WP pin status.

Write Protect Area

Write protect area

WP pin status

512k bit

Full (512k bit)

Normal read/write operation