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ADS7830IPWTG4 Datasheet(PDF) 11 Page - Texas Instruments |
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ADS7830IPWTG4 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 26 page  Microcontroller +2.7V to +3.6V 1 F to m 10 F m + 2kW 2kW 5W 1 F to m 10 F m + 0.1 F m ADS7830 REF / IN REF OUT CH0 V DD SDA SCL A0 A1 GND CH1 CH2 CH3 CH4 CH5 CH6 CH7 COM ADS7830 www.ti.com SBAS302C – DECEMBER 2003 – REVISED OCTOBER 2012 THEORY OF OPERATION REFERENCE The ADS7830 is a classic Successive Approximation Register (SAR) A/D converter. The architecture is The ADS7830 can operate with an internal 2.5V based on capacitive redistribution which inherently reference or an external reference. If a +5V supply is includes a sampleand- hold function. The converter is used, an external +5V reference is required in order fabricated on a 0.6µ CMOS process. to provide full dynamic range for a 0V to +VDD analog input. This external reference can be as low as The ADS7830 core is controlled by an internally 50mV. When using a +2.7V supply, the internal +2.5V generated free-running clock. When the ADS7830 is reference will provide full dynamic range for a 0V to not performing conversions or being addressed, it +VDD analog input. keeps the A/D converter core powered off, and the internal clock does not operate. As the reference voltage is reduced, the analog voltage weight of each digital output code is reduced. The simplified diagram of input and output for the This is often referred to as the LSB (least significant ADS7830 is shown in Figure 13. bit) size and is equal to the reference voltage divided by 256. This means that any offset or gain error ANALOG INPUT inherent in the A/D converter will appear to increase, in terms of LSB size, as the reference voltage is When the converter enters the hold mode, the reduced. voltage on the selected CHx pin is captured on the internal capacitor array. The input current on the The noise inherent in the converter will also appear to analog inputs depends on the conversion rate of the increase with lower LSB size. With a 2.5V reference, device. During the sample period, the source must the internal noise of the converter typically contributes charge the internal sampling capacitor (typically only 0.02LSB peak-to-peak of potential error to the 25pF). After the capacitor has been fully charged, output code. When the external reference is 50mV, there is no further input current. The amount of the potential error contribution from the internal noise charge transfer from the analog source to the will be 50 times larger—1LSB. The errors due to the converter is a function of conversion rate. internal noise are Gaussian in nature and can be reduced by averaging consecutive conversion results. Figure 13. Simplified I/O of the ADS7830 Copyright © 2003–2012, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: ADS7830 |
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