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ADC12D1000RFIUT Datasheet(PDF) 15 Page - Texas Instruments |
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ADC12D1000RFIUT Datasheet(HTML) 15 Page - Texas Instruments |
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15 / 74 page  I / O GND V A TO INTERNAL CIRCUITRY ADC12D1000RF, ADC12D1600RF www.ti.com SNAS519G – JULY 2011 – REVISED APRIL 2013 Operating Ratings(1)(2) (continued) Common Mode Input Voltage VCMO - 150 mV < VCMI < VCMO +150 mV 3.3 Package Thermal Resistance Package θJA θJC1 θJC2 292-Ball BGA Thermally Enhanced Package 16°C/W 2.9°C/W 2.5°C/W Soldering process must comply with Reflow Temperature Profile specifications. Refer to www.ti.com/packaging(1) (1) Reflow temperature profiles are different for lead-free and non-lead-free packages. 3.4 Converter Electrical Characteristics Static Converter Characteristics Unless otherwise specified, the following apply after calibration for VA = VDR = VTC = VE = +1.9V; I- and Q-channels, AC- coupled, unused channel terminated to AC ground, FSR Pin = High; CL = 10 pF; Differential, AC coupled Sine Wave Sampling Clock, fCLK = 1600/1000 MHz at 0.5 VP-P with 50% duty cycle (as specified); VBG = Floating; Non-Extended Control Mode; Rext = Rtrim = 3300 Ω ± 0.1%; Analog Signal Source Impedance = 100Ω Differential; Non-Demux Non-DES Mode; Duty Cycle Stabilizer on. Boldface limits apply for TA = TMIN to TMAX. All other limits TA = 25°C, unless otherwise noted. (1) (2) (3) ADC12D1600RF ADC12D1000RF Units Symbol Parameter Conditions (Limits) Typ Lim Typ Lim Resolution with No Missing 12 12 bits Codes INL Integral Non-Linearity 1 MHz DC-coupled over-ranged ±2.5 ±7.25 ±2.5 ±7.25 LSB (max) (Best fit) sine wave DNL Differential Non-Linearity 1 MHz DC-coupled over-ranged ±0.4 ±0.96 ±0.4 ±0.96 LSB (max) sine wave VOFF Offset Error 5 5 LSB VOFF_ADJ Input Offset Adjustment Range Extended Control Mode ±45 ±45 mV PFSE Positive Full-Scale Error See (4) ±25 ±25 mV (max) NFSE Negative Full-Scale Error See (4) ±25 ±25 mV (max) Out-of-Range Output Code(5) (VIN+) − (VIN−) > + Full Scale 4095 4095 (VIN+) − (VIN−) < − Full Scale 0 0 (1) The analog inputs, labeled "I/O", are protected as shown below. Input voltage magnitudes beyond the Absolute Maximum Ratings may damage this device. (2) To ensure accuracy, it is required that VA, VTC, VE and VDR be well-bypassed. Each supply pin must be decoupled with separate bypass capacitors. (3) Typical figures are at TA = 25°C, and represent most likely parametric norms. Test limits are specified to TI's AOQL (Average Outgoing Quality Level). (4) Calculation of Full-Scale Error for this device assumes that the actual reference voltage is exactly its nominal value. Full-Scale Error for this device, therefore, is a combination of Full-Scale Error and Reference Voltage Error. See Figure 4-2. For relationship between Gain Error and Full-Scale Error, see Specification Definitions for Gain Error. (5) This parameter is specified by design and is not tested in production. Copyright © 2011–2013, Texas Instruments Incorporated Electrical Specifications 15 Submit Documentation Feedback Product Folder Links: ADC12D1000RF ADC12D1600RF |
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