REV. A

–10–

SSM2018T/SSM2118T

to run it in the noninverting single-ended mode. If either input

is unused, the associated 18 k

Ω resistor and coupling capacitor

should be removed to prevent any additional noise.

The common-mode rejection in balanced mode is typically

55 dB up to 1 kHz, decreasing at higher frequencies as shown in

Figure 34. To ensure good CMRR in the balanced configura-

tion, the input resistors must be balanced. For example, a 1%

mismatch results in a CMRR of 40 dB. To achieve 55 dB,

these resistors should have an absolute tolerance match of 0.1%.

The output of the basic VCA is taken from Pin 14, which is the

output of an internal amplifier. Notice that the second voltage

output (Pin 16) is connected to the negative supply. This is

normal and actually disables that output amplifier ensuring that

it will not oscillate and cause interference problems. Shorting

the output to the negative supply does not cause the supply cur-

rent to increase. This amplifier is only used in the “OVCE” ap-

plication explained later.

The control port follows a 30 mV/dB control law. The applica-

tion circuit shows a 3 k

Ω and 1 kΩ resistor divider from a con-

trol voltage. The choice of these resistors is arbitrary and could

be any values to properly scale the control voltage. In fact, these

resistors could be omitted if the control voltage is already prop-

erly scaled. The 1

µF capacitor is in place to provide some fil-

tering of the control signal. Although the control feedthrough is

trimmed at the factory, the feedthrough increases with fre-

quency (Figure 29). Thus, high frequency noise can

feedthrough and add to the noise of the VCA. Filtering the

control signal helps minimize this source of noise.

Theory of Operation of the SSM2018T

The SSM2018T has the same internal circuitry as the original

SSM2018. The detailed diagram in Figure 38 shows the main

components of the VCA. The essence of the SSM2018T is the

gain core, which is comprised of two differential pairs (Q1–Q4).

gain core is steered to one side or the other of the two differen-

tial pairs. The tail current for these differential pairs is set by

the mode bias of the VCA (Class A or AB), which is labeled as

age, more current is steered (by the “Splitter”) to the left

differential pair, and the opposite is true for a negative input.

To understand how the gain control works, a simple example is

best. Take the case of a positive control voltage on Pin 11. No-

tice that the bases of Q2 and Q3 are connected to ground via a

200

Ω resistor. A positive control voltage produces a positive

voltage on the bases of Q1 and Q4. Concentrating on the left

most differential pair, this raises the base voltage of Q1 above

that of Q2. Thus, more of the tail current is steered through Q1

than through Q2. The current from the collector of Q2 flows

through the external 18 k

Ω feedback resistor around amplifier

A3. When this current is reduced, the output voltage is also re-

duced. Thus, a positive control voltage results in an attenuation

of the input signal, which explains why the gain constant is

negative.

The collector currents of Q2 and Q3 produce the output volt-

age. The output of Q3 is mirrored by amplifier A1 to add to the

overall output voltage. On the other hand, the collector cur-

rents of Q1 and Q4 are used for feedback to the differential in-

puts. Because Pins 6 and 4 are shorted together, any input

voltage produces an input current which flows into Pin 4. The

APPLICATIONS

The SSM2018T is a trimless Voltage Controlled Amplifier

(VCA) for volume control in audio systems. The SSM2018T is

identical to the original SSM2018 in functionality and pinout;

however, it is the first professional quality audio VCA

in the marketplace that does not require an external trim-

ming potentiometer to minimize distortion. Instead, the

SSM2018T is laser trimmed before it is packaged to ensure the

specified THD and control feedthrough performance. This has

a significant savings in not only the cost of external trimming

potentiometers, but also the manufacturing cost of performing

the trimming during production.

The SSM2118T is identical to the SSM2018T except that dif-

ferential current outputs are provided as opposed to a voltage

output. This output configuration is ideal for bus summing ap-

plications where multiple audio signals are summed together.

These signals often require long lead lengths or cable runs to

reach the summing stage. Transmitting the signals in a differen-

tial current mode minimizes the chance for noise pickup and for

line impedances to upset the balance of the system. The

SSM2118T is also factory trimmed to minimize distortion and

control feedthrough. Thus, no individual trim is required for

each part. One global trim at the summing amplifier stage may

be necessary to properly balance the resistors in this stage, as ex-

plained later.

Basic VCA Configuration

The primary application circuit for the SSM2018T is the basic

VCA configuration, which is shown in Figure 37. This configu-

ration uses differential current feedback to realize the VCA. A

complete description of the internal circuitry of the VCA and

this configuration is given in the Theory of Operation section

below. The SSM2018T and SSM2118T are trimmed at the factory

for operation in the basic VCA configuration with class AB biasing.

Thus, for optimal distortion and control feedthrough perfor-

mance, the same configuration and biasing should be used. All

of the graphs for the SSM2018T in the data sheet have been

measured using the circuit of Figure 37.

V+

1

µF

R

B

150k

18k

V+

18k

V

IN+

1

µF 18k

V

IN–

47pF

1

µF

50pF

1k

V

CONTROL

3k

V

OUT

V–

1

2

16

15

5

6

7

12

11

10

3

4

14

13

89

SSM2018T

Figure 37. SSM2018T Basic VCA Application Circuit

In the simple VCA configuration, the SSM2018T inputs are at a

virtual ground. Thus, 18 k

Ω resistors are required to convert

the input voltages to input currents. The schematic also shows

ac coupling capacitors. These are inserted to minimize dc off-

sets generated by bias current through the resistors. Without the

capacitors, the dc offset due to the input bias current is typically

5 mV. The input stage has the flexibility to run either inverting,

noninverting, or balanced. The most common configuration is

OBSOLETE