Electronic Components Datasheet Search |
|
EVAL-AD73360EZ Datasheet(PDF) 7 Page - Analog Devices |
|
EVAL-AD73360EZ Datasheet(HTML) 7 Page - Analog Devices |
7 / 35 page REV. A AD73360 –7– t3 t2 t1 Figure 1. MCLK Timing TO OUTPUT PIN +2.1V 100 A 100 A IOL IOH CL 15pF Figure 2. Load Circuit for Timing Specifications t3 t1 t2 t13 * SCLK IS INDIVIDUALLY PROGRAMMABLE IN FREQUENCY (MCLK/4 SHOWN HERE). t4 t5 t6 MCLK SCLK* Figure 3. SCLK Timing t11 t7 t9 t10 t12 t7 t8 SE (I) SCLK (O) SDIFS (I) SDI (I) SDOFS (O) SDO (O) THREE- STATE THREE- STATE THREE- STATE D15 D2 D1 D0 D14 D15 D1 D14 D15 D15 t8 D0 Figure 4. Serial Port (SPORT) VIN – dBm0 –85 5 –75 –65 –55 –45 –35 –25 –15 –5 80 70 –10 30 20 10 0 50 40 60 3.17 Figure 5a. S/(N+D) vs. VIN (ADC @ 3 V) Over Voiceband Bandwidth (300 Hz–3.4 kHz) VIN – dBm0 –85 5 –75 –65 –55 –45 –35 –25 –15 –5 80 70 –10 30 20 10 0 50 40 60 3.17 Figure 5b. S/(N+D) vs. VIN (ADC @ 5 V) Over Voiceband Bandwidth (300 Hz–3.4 kHz) |
Similar Part No. - EVAL-AD73360EZ |
|
Similar Description - EVAL-AD73360EZ |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.COM |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |