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5962-8964701PA Datasheet(PDF) 9 Page - Analog Devices |
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5962-8964701PA Datasheet(HTML) 9 Page - Analog Devices |
9 / 12 page AD847 REV. F –9– OFFSET NULLING The input offset voltage of the AD847 is very low for a high speed op amp, but if additional nulling is required, the circuit shown in Figure 21 can be used. Figure 21. Offset Nulling INPUT CONSIDERATIONS An input resistor (RIN in Figure 20) is required in circuits where the input to the AD847 will be subjected to transient or con- tinuous overload voltages exceeding the ±6 V maximum differ- ential limit. This resistor provides protection for the input transistors by limiting the maximum current that can be forced into their bases. For high performance circuits it is recommended that a resistor (RB in Figures 19 and 20) be used to reduce bias current errors by matching the impedance at each input. The offset voltage er- ror will be reduced by more than an order of magnitude. THEORY OF OPERATION The AD847 is fabricated on Analog Devices’ proprietary complementary bipolar (CB) process which enables the con- struction of pnp and npn transistors with similar fTs in the 600 MHz to 800 MHz region. The AD847 circuit (Figure 22) includes an npn input stage followed by fast pnps in the folded cascode intermediate gain stage. The CB pnps are also used in the current amplifying output stage. The internal compensation capacitance that makes the AD847 unity gain stable is provided by the junction capacitances of transistors in the gain stage. The capacitor, CF, in the output stage mitigates the effect of ca- pacitive loads. At low frequencies and with low capacitive loads, the gain from the compensation node to the output is very close to unity. In this case CF is bootstrapped and does not contribute to the compensation capacitance of the part. As the capacitive load is increased, a pole is formed with the output impedance of the output stage. This reduces the gain, and therefore, CF is incompletely bootstrapped. Some fraction of CF contributes to the compensation capacitance, and the unity gain bandwidth falls. As the load capacitance is increased, the band- width continues to fall, and the amplifier remains stable. C F –IN +IN NULL 1 NULL 8 OUTPUT +VS –VS Figure 22. AD847 Simplified Schematic GROUNDING AND BYPASSING In designing practical circuits with the AD847, the user must remember that whenever high frequencies are involved, some special precautions are in order. Circuits must be built with short interconnect leads. A large ground plane should be used whenever possible to provide a low resistance, low inductance circuit path, as well as minimizing the effects of high frequency coupling. Sockets should be avoided because the increased interlead capacitance can degrade bandwidth. Feedback resistors should be of low enough value to assure that the time constant formed with the capacitance at the amplifier summing junction will not limit the amplifier performance. Resistor values of less than 5 k Ω are recommended. If a larger resistor must be used, a small (<10 pF) feedback capacitor in parallel with the feedback resistor, RF, may be used to compen- sate for the input capacitances and optimize the dynamic perfor- mance of the amplifier. Power supply leads should be bypassed to ground as close as possible to the amplifier pins. Ceramic disc capacitors of 0.1 µF are recommended. |
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