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5962-89805012A Datasheet(PDF) 14 Page - Analog Devices

Part # 5962-89805012A
Description  Integrated Circuit True RMS-to-DC Converter
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

5962-89805012A Datasheet(HTML) 14 Page - Analog Devices

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Data Sheet
AD536A
Rev. E | Page 13 of 16
The primary disadvantage in using a large CAV to remove ripple
is that the settling time for a step change in input level is
increased proportionately. Figure 19 illustrates that the
relationship between CAV and 1% settling time is 115 ms for
each microfarad of CAV. The settling time is twice as great for
decreasing signals as it is for increasing signals. The values in
Figure 19 are for decreasing signals. Settling time also increases
for low signal levels, as shown in Figure 20.
10
100
1k
10k
0.1
1
10
100
0.01
1
100k
INPUT FREQUENCY (Hz)
0.1
1
10
100
0.01
1PERCENT DC ERROR AND PERCENT RIPPLE (PEAK)
VALUES FOR CAV AND
1% SETTLING TIME
FOR STATED % OF READING
AVERAGING ERROR1
ACCURACY ± 20% DUE TO
COMPONENT TOLERANCE
Figure 19. Error/Settling Time Graph for Use with the Standard RMS
Connection (See Figure 13 Through Figure 15)
10m
100m
1
7.5
10.0
5.0
1m
10
rms INPUT LEVEL (V)
1.0
2.5
Figure 20. Settling Time vs. Input Level
A better method to reduce output ripple is the use of a postfilter.
Figure 21 shows a suggested circuit. If a single-pole filter is used
(C3 removed, RX shorted) and C2 is approximately twice the
value of CAV, the ripple is reduced, as shown in Figure 22, and
settling time is increased. For example, with CAV = 1 µF and C2
= 2.2 μF, the ripple for a 60 Hz input is reduced from 10% of
reading to approximately 0.3% of reading.
The settling time, however, is increased by approximately a
factor of 3. Therefore, the values of CAV and C2 can be reduced
to permit faster settling times while still providing substantial
ripple reduction.
The two-pole postfilter uses an active filter stage to provide
even greater ripple reduction without substantially increasing
the settling times over a circuit with a one-pole filter. The values
of CAV, C2, and C3 can then be reduced to allow extremely fast
settling times for a constant amount of ripple. Caution should
be exercised in choosing the value of CAV, because the dc error
is dependent on this value and is independent of the postfilter.
For a more detailed explanation of these topics, refer to the RMS to
DC Conversion Application Guide, 2nd Edition, available online
from Analog Devices, Inc., at www.analog.com.
C2
VIN
CAV
+VS
14
13
12
11
10
9
8
1
2
3
4
5
6
7
AD536A
25kΩ
ABSOLUTE
VALUE
SQUARER/
DIVIDER
CURRENT
MIRROR
–VS
Rx
24kΩ
+
C31
Vrms OUT
1FOR SINGLE POLE, SHORT Rx, REMOVE C3.
VIN
NC
–VS
CAV
+VS
NC
NC
NC
dB
COM
BUF OUT
RL
BUF IN
IOUT
BUF
Figure 21. Two-Pole Postfilter
1
1k
100
10k
0.1
10
10
PEAK-TO-PEAK RIPPLE
CAV = 1µF
DC ERROR
CAV = 1µF
(ALL FILTERS)
PEAK-TO-PEAK RIPPLE
CAV = 1µF
C2 = C3 = 2.2µF (TWO-POLE)
Rx = 0Ω
PEAK-TO-PEAK
RIPPLE (ONE POLE)
CAV = 1µF, C2 = 2.2µF
FREQUENCY (Hz)
Figure 22. Performance Features of Various Filter Types
(See Figure 13 to Figure 15 for Standard RMS Connection)


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