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TPS72718YFFT Datasheet(PDF) 2 Page - Texas Instruments |
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TPS72718YFFT Datasheet(HTML) 2 Page - Texas Instruments |
2 / 21 page TPS727xx SBVS128C – JUNE 2009 – REVISED JANUARY 2011 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION(1) PRODUCT VOUT (2) TPS727xxx yyy z XXX is the nominal output voltage. YYY is package designator. Z is package tape and reel quantity (R = 3000, T = 250). (1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or visit the device product folder at www.ti.com. (2) Output voltages from 0.9V to 5.0V in 50mV increments are available through the use of innovative factory EEPROM programming; minimum order quantities may apply. Contact factory for details and availability. ABSOLUTE MAXIMUM RATINGS (1) At TJ = –40°C to +125°C (unless otherwise noted). All voltages are with respect to GND. PARAMETER TPS727xx UNIT Input voltage range, VIN –0.3 to +6.0 V Enable voltage range, VEN –0.3 to +6.0(2) V Output voltage range, VOUT –0.3 to +6.0 V Maximum output current, IOUT Internally limited Output short-circuit duration Indefinite Total continuous power dissipation, PDISS See Dissipation Ratings Table Human body model (HBM) 2 kV ESD rating Charged device model (CDM) 500 V Operating junction temperature range, TJ –55 to +150 °C Storage temperature range, TSTG –55 to +150 °C (1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. (2) VEN absolute maximum rating is VIN or 6.0V, whichever is less. DISSIPATION RATINGS DERATING FACTOR BOARD PACKAGE RqJC RqJA ABOVE TA = +25°C TA < +25°C TA = +70°C TA = +85°C High-K(1) DSE — 206°C/W 4.85mW/°C 485mW 269mW 194mW High-K(1) YFF 85°C/W 268°C/W 3.7mW/°C 370mW 205mW 150mW (1) The JEDEC high-K (2s2p) board used to derive this data was a 3-inch × 3-inch, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on top and bottom of the board. 2 Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated |
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