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CC1812 Datasheet(PDF) 10 Page - Silicon Laboratories |
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CC1812 Datasheet(HTML) 10 Page - Silicon Laboratories |
10 / 38 page Si3226/7 Si3208/9 10 Preliminary Rev. 0.33 Table 8. DC Characteristics (VDD = 3.13 to 3.47 V, TA = 0 to 70 °C for F-Grade, –40 to 85 °C for G-Grade) Parameter Symbol Test Condition Min Typ Max Unit High Level Input Voltage VIH 0.7 x VDD —5.25 V Low Level Input Voltage VIL — — 0.3 x VDD V High Level Output Voltage VOH IO =4mA VDD –0.6 — — V Low Level Output Voltage VOL DTX, SDO, INT, SDITHRU: IO =–4mA —— 0.4 V GPIO1 a/b, GPIO2 a/b: IO =–40 mA — — 0.72 SDITHRU internal pullup resistance 35 50 — k Ω Relay Driver Source Impedance ROUT VDD1–VDD4 =3.13V IO < 28 mA —63 — Ω Relay Driver Sink Impedance RIN VDD1–VDD4 =3.13V IO < 85 mA —11 — Ω Input Leakage Current IL —— 10 µA Table 9. Switching Characteristics—General Inputs1 (VDD = 3.13 to 5.25 V, TA = 0 to 70 °C for F-Grade, –40 to 85 °C for G-Grade, CL =20 pF) Parameter Symbol Min Typ Max Unit Rise Time, RESET tr —— 5 ns RESET Pulse Width, GCI Mode2,3 trl 33/PCLK — — µs RESET Pulse Width, SPI Daisy Chain Mode3 trl 33/PCLK — — µs Notes: 1. All timing (except Rise and Fall time) is referenced to the 50% level of the waveform. Input test levels are VIH =VDD – 0.4 V, VIL = 0.4 V. Rise and Fall times are referenced to the 20% and 80% levels of the waveform. 2. The minimum RESET pulse width assumes the SDITHRU pin is tied to ground via a pulldown resistor no greater than 10 k Ω per device. 3. The minimum RESET pulse width is 33/PCLK frequency (i.e. 33/8.192 MHz = 4 µs). |
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