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MM80C95 Datasheet(PDF) 4 Page - Fairchild Semiconductor |
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MM80C95 Datasheet(HTML) 4 Page - Fairchild Semiconductor |
4 / 7 page ![]() www.fairchildsemi.com 4 AC Electrical Characteristics (Note 4) TA = 25°C, CL = 50 pF, unless otherwise noted. Note 4: AC Parameters are guaranteed by DC correlated testing. Note 5: Capacitance is guaranteed by periodic testing. Note 6: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics application note AN-90. AC Test Circuits and Switching Time Waveforms tpd0, tpd1 CMOS to CMOS t1H and tH1 t1H Symbol Parameter Conditions Min Typ Max Units tpd0, tpd1 Propagation Delay Time to a Logical “0” or Logical “1” from Data Input to Output MM80C95, MM80C97 VCC = 5V 60 100 ns VCC = 10V 25 40 ns MM80C98 VCC = 5V 70 150 ns VCC = 10V 35 75 ns tpd0, tpd1 Propagation Delay Time to a Logical “0” or Logical “1” from Data Input to Output MM80C95, MM80C97 VCC = 5V, CL = 150 pF 85 160 ns VCC = 10V, CL = 150 pF 40 80 ns MM80C98 VCC = 5V, CL = 150 pF 95 210 ns VCC = 10V, CL = 150 pF 45 110 ns t1H, t0H Delay from Disable Input to High Impedance RL = 10k, CL = 5 pF State, (from Logical “1” or Logical “0”) MM80C95 VCC = 5V 80 135 ns VCC = 10V 50 90 ns MM80C97 VCC = 5V 70 125 ns VCC = 10V 50 90 ns MM80C98 VCC = 5V 90 170 ns VCC = 10V 70 125 ns tH1, tH0 Delay from Disable Input to Logical “1” Level RL = 10k, CL = 50 pF (from High Impedance State) MM80C95 VCC = 5V 120 200 ns VCC = 10V 50 90 ns MM80C96 VCC = 5V 130 225 ns VCC = 10V 60 110 ns MM80C98 VCC = 5V 120 200 ns VCC = 10V 50 90 ns CIN Input Capacitance Any Input (Note 5) 5.0 pF COUT Output Capacitance 3-STATE Any Output (Note 5) 11 pF CPD Power Dissipation Capacitance (Note 6) 60 pF |