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S1C17002 Datasheet(PDF) 2 Page - Epson Company

Part # S1C17002
Description  Low Power 16-bit single Chip Microcontroller
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Manufacturer  EPSON [Epson Company]
Direct Link  http://www.epsondevice.com
Logo EPSON - Epson Company

S1C17002 Datasheet(HTML) 2 Page - Epson Company

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S1C17002
2
Seiko Epson Corporation
- I2C master (one system)
- I2C slave (two systems)
- RTC (one system)
- 8-bit programmable timers (four systems)
- 8-bit OSC1 timers (two systems)
- Extended SPI (one system)
- Remote controller (one system)
- The interrupt level (priority) of each maskable interrupt system is configurable (levels 0 to 7).
Prescaler
Generates the source clocks for the clock generator.
16-bit Multi-Function Timer
One channel of 16-bit timer/counter with PWM output function is available.
Can generate two compare-match interrupts.
Supports the IGBT output control function using the A/D converter out-of-range signal.
Clock Generator
One channel of 16-bit timer and three channels of 8-bit timers are available.
Can be used as the clock source for the UART, SPI, and I2C master.
Each timer can generate an underflow interrupt.
8-bit Programmable Timers
Four channels of 8-bit timers (presettable down counter) are available.
Can be used as an interval timer to trigger the ADC.
Each timer can generate an underflow interrupt.
8-bit OSC1 Timers
Two channels of 8-bit timers (presettable down counter) that are driven with the OSC1 clock are available.
Each timer can generate an underflow interrupt.
Watchdog Timer
30-bit watchdog timer to generate a reset or an NMI
The watchdog timer overflow period (reset or NMI interrupt period) is programmable.
The watchdog timer overflow signal can be output outside the IC.
RTC
Contains time counters (second, minute, and hour) and calendar counters (day, day of the week, month, and year).
Periodic interrupts are possible.
UART
One channel of UART is available.
Supports IrDA 1.0 interface.
Two-byte receive data buffer and one-byte transmit buffer are built in to support full-duplex communication.
Transfer rate: 150 to 460800 bps, character length: seven or eight bits, parity mode: even, odd, or no parity, stop bit:
one or two bits
Parity error, framing error, and overrun error detectable
Each channel can generate receive buffer full, transmit buffer empty, and receive error interrupts.
SPI
Supports both master and slave modes.
One-byte receive data buffer and one-byte transmit buffer are built in.
Data length: eight bits fixed (MSB first)
Data transfer timing (clock phase and polarity variations) is selectable from among 4 types.
Can generate receive buffer full and transmit buffer empty interrupts.
Extended SPI
Supports both master and slave modes.
One-byte receive data buffer and one-byte transmit buffer are built in.
Data length: eight bits fixed (MSB first)
Data transfer timing (clock phase and polarity variations) is selectable from among 4 types.
Can generate receive buffer full and transmit buffer empty interrupts.
Exclusive clock source is available.
I
2C Master
Data format: 8 bits (MSB first)
Addressing mode: 7-bit addressing (10-bit addressing is not supported.)
Incorporates a noise rejector (can be enabled by a register).
Can generate receive buffer full and transmit buffer empty interrupts.
I
2C Slave
Data format: 8 bits (MSB first)
Addressing mode: 7-bit addressing (10-bit addressing is not supported.)
Supports a clock stretch function
Incorporates a noise rejector (can be enabled by a register).
Can generate receive, transmit, and bus status interrupts.


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