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MM74HC374 Datasheet(PDF) 4 Page - Fairchild Semiconductor |
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MM74HC374 Datasheet(HTML) 4 Page - Fairchild Semiconductor |
4 / 7 page ![]() www.fairchildsemi.com 4 AC Electrical Characteristics VCC = 2.0−6.0V, CL = 50 pF, tr = tf = 6 ns (unless otherwise specified) Note 5: CPD determines the no load dynamic power consumption, PD = CPD VCC 2f + I CC VCC, and the no load dynamic current consumption, IS = CPD VCC f + ICC. Symbol Parameter Conditions VCC TA = 25°CTA = −40 to 85°CTA = −55 to 125°C Units Typ Guaranteed Limits fMAX Maximum Operating CL = 50 pF 2.0V 6 5 4 MHz Frequency 4.5V 30 24 20 MHz 6.0V 35 28 23 MHz tPHL, tPLH Maximum Propagation CL = 50 pF 2.0V 68 180 225 270 ns Delay, Clock to Q CL = 150 pF 2.0V 110 230 288 345 ns CL = 50 pF 4.5V 22 36 45 48 ns CL = 150 pF 4.5V 30 46 57 69 ns CL = 50 pF 6.0V 20 31 39 46 ns CL = 150 pF 6.0V 28 40 50 60 ns tPZH, tPZL Maximum Output RL = 1 kΩ Enable Time CL = 50 pF 2.0V 50 150 189 225 ns CL = 150 pF 2.0V 80 200 250 300 ns CL = 50 pF 4.5V 21 30 37 45 ns CL = 150 pF 4.5V 30 40 50 60 ns CL = 50 pF 6.0V 19 26 31 39 ns CL = 150 pF 6.0V 26 35 44 53 ns tPHZ, tPLZ Maximum Output RL = 1 kΩ 2.0V 50 150 189 225 ns Disable Time CL = 50 pF 4.5V 21 30 37 45 ns 6.0V 19 26 31 39 ns tS Minimum Setup Time 2.0V 50 60 75 ns 4.5V 9 13 15 ns 6.0V 9 11 13 ns tH Minimum Hold Time 2.0V 5 30 5 ns 4.5V 5 5 5 ns 6.0V 5 5 5 ns tW Minimum Pulse Width 2.0V 30 80 100 120 ns 4.5V 9 16 20 24 ns 6.0V 8 14 18 20 ns tTHL, tTLH Maximum Output Rise CL = 50 pF 2.0V 25 60 75 90 ns and Fall Time 4.5V 7 12 15 18 ns 6.0V 6 10 13 15 ns tr, tf Maximum Input Rise and 2.0V 1000 1000 1000 ns Fall Time, Clock 4.5V 500 500 500 ns 6.0V 400 400 400 ns CPD Power Dissipation (per flip-flop) Capacitance (Note 5) OC = V CC 30 pF OC =GND 50 pF CIN Maximum Input Capacitance 5 10 10 10 pF |
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