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74HC273D-Q100 Datasheet(PDF) 4 Page - NXP Semiconductors |
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74HC273D-Q100 Datasheet(HTML) 4 Page - NXP Semiconductors |
4 / 19 page ![]() 74HC_HCT273_Q100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 1 — 19 June 2013 4 of 19 NXP Semiconductors 74HC273-Q100; 74HCT273-Q100 Octal D-type flip-flop with reset; positive-edge trigger 5. Pinning information 5.1 Pinning 5.2 Pin description (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Fig 5. Pin configuration SO20 and TSSOP20 Fig 6. Pin configuration DHVQFN20 Table 2. Pin description Symbol Pin Description MR 1 master reset input (active LOW) Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7 2, 5, 6, 9, 12, 15, 16, 19 flip-flop output D0, D1, D2, D3, D4, D5, D6, D7 3, 4, 7, 8, 13, 14, 17, 18 data input GND 10 ground (0 V) CP 11 clock input (LOW-to-HIGH, edge-triggered) VCC 20 supply voltage |
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