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CP2120 Datasheet(PDF) 10 Page - Silicon Laboratories |
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CP2120 Datasheet(HTML) 10 Page - Silicon Laboratories |
10 / 24 page CP2120 10 Rev. 0.4 5.1. Command Set An SPI Master controls the CP2120 by sending commands across the SPI bus. Some commands initiate I2C transactions, while other commands modify or monitor CP2120 operation and events. 5.2. Internal Registers The CP2120 maintains a set of internal registers that can be modified to configure general purpose port I/O and I2C operation and can be read to obtain device status. Commands reading to and writing from the internal registers can be issued at any time, even while an I2C transaction is in progress, as they do not initiate any I2C bus transactions. Table 3 shows a list of all internal registers. 5.2.1. Write to Internal Register A Write to Internal Register command updates the value of one of the CP2120's Internal Registers. A Write to Internal Register command begins with the command byte, 0x20, followed by the internal register address, followed by the new value of the internal register. Only one register can be accessed per Write to Internal Register command. Table 3. Internal Register Addresses Internal Register Address Section IOCONFIG 0x00 7. IOSTATE 0x01 7. I2CCLOCK 0x02 6.1 I2CTO 0x03 6.1 I2CSTAT 0x04 6.2 I2CADR 0x05 6.1 RXBUFF 0x06 6.3 IOCONFIG2 0x07 7. EDGEINT 0x08 7. I2CTO2 0x09 6.1 0x20 COMMAND REGISTER X DATA BYTE SPI Master |
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