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MM74HC125 Datasheet(PDF) 3 Page - Fairchild Semiconductor

Part No. MM74HC125
Description  3-STATE Quad Buffers
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Manufacturer  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

MM74HC125 Datasheet(HTML) 3 Page - Fairchild Semiconductor

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AC Electrical Characteristics
VCC = 5V, TA = 25°C, CL = 45 pF, tr = tf = 6 ns
AC Electrical Characteristics
VCC = 2.0V to 6.0V, CL = 50 pF, tr = tf = 6 ns (unless otherwise specified)
Note 5: CPD determines the no load dynamic power consumption, PD = CPD VCC
2f
+ I
CC VCC, and the no load dynamic current consumption,
IS = CPD VCC f + ICC.
Symbol
Parameter
Conditions
Typ
Guaranteed
Limit
Units
tPHL, tPLH
Maximum
13
18
ns
Propagation Delay Time
tPZH
Maximum
RL = 1 kΩ
13
25
ns
Output Enable Time to HIGH Level
tPHZ
Maximum
RL = 1 kΩ
17
25
ns
Output Disable Time from HIGH Level
CL = 5 pF
tPZL
Maximum
RL = 1 kΩ
18
25
ns
Output Enable Time to LOW Level
tPLZ
Maximum
RL = 1 kΩ
13
25
ns
Output Disable Time from LOW Level
CL = 5 pF
Symbol
Parameter
Conditions
VCC
TA = 25°CTA = −40 to 85°CTA = −40 to 125°C
Units
Typ
Guaranteed Limits
tPHL, tPLH Maximum Propagation
2.0V
40
100
125
150
ns
Delay Time
4.5V
14
20
25
30
ns
6.0V
12
17
21
25
ns
tPLH, tPHL Maximum Propagation
CL = 150 pF
2.0V
35
130
163
195
ns
Delay Time
4.5V
14
26
33
39
ns
6.0V
12
22
28
39
ns
tPZH, tPZL Maximum Output
RL = 1 kΩ
2.0V
25
125
156
188
ns
Enable Time
4.5V
14
25
31
38
ns
6.0V
12
21
26
31
ns
tPHZ, tPLZ Maximum Output
RL = 1 kΩ
2.0V
25
125
156
188
ns
Disable Time
4.5V
14
25
31
38
ns
6.0V
12
21
26
31
ns
tPZL, tPZH Maximum Output
CL = 150 pF
2.0V
35
140
175
210
ns
Enable Time
RL = 1 kΩ
4.5V
15
28
35
42
ns
6.0V
13
24
30
36
ns
tTLH, tTHL Maximum Output
CL = 50 pF
2.0V
30
60
75
90
ns
Rise and Fall Time
4.5V
7
12
15
18
ns
6.0V
6
10
13
15
ns
CIN
Input Capacitance
5
10
10
10
pF
COUT
Output Capacitance Outputs
15
20
20
20
pF
CPD
Power Dissipation
(per gate)
Capacitance (Note 5)
Enabled
45
pF
Disabled
6
pF


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