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MM74C74 Datasheet(PDF) 4 Page - Fairchild Semiconductor

Part No. MM74C74
Description  Dual D-Type Flip-Flop
Download  7 Pages
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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MM74C74 Datasheet(HTML) 4 Page - Fairchild Semiconductor

   
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4
AC Electrical Characteristics (Note 3)
TA = 25°C, CL = 50 pF, unless otherwise noted
Note 3: AC Parameters are guaranteed by DC correlated testing.
Note 4: Capacitance is guaranteed by periodic testing.
Note 5: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics Application Note—
AN-90.
Typical Applications
Ripple Counter (Divide by 2n)
Shift Register
74C Compatibility
Guaranteed Noise Margin as a Function of VCC
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CIN
Input Capacitance
Any Input (Note 4)
5.0
pF
tpd
Propagation Delay Time to a
VCC = 5V
180
300
ns
Logical “0” tpd0 or Logical “1”
VCC = 10V
70
110
tpd1 from Clock to Q or Q
tpd
Propagation Delay Time to a
VCC = 5V
180
300
ns
Logical “0” from Preset or Clear
VCC = 10V
70
110
tpd
Propagation Delay Time to a
VCC = 5V
250
400
ns
Logical “1” from Preset or Clear
VCC = 10V
100
150
tS0, tS1
Time Prior to Clock Pulse that
VCC = 5V
100
50
ns
Data Must be Present tSETUP
VCC = 10V
40
20
tH0, tH1
Time after Clock Pulse that
VCC = 5V
−20
0
ns
Data Must be Held
VCC = 10V
−8.0
0
tPW1
Minimum Clock Pulse
VCC = 5V
100
250
ns
Width (tWL = tWH)VCC = 10V
40
100
tPW2
Minimum Preset and
VCC = 5V
100
160
ns
Clear Pulse Width
VCC = 10V
40
70
tr, tf
Maximum Clock Rise
VCC = 5V
15.0
µs
and Fall Time
VCC = 10V
5.0
fMAX
Maximum Clock Frequency
VCC = 5V
2.0
3.5
MHz
VCC = 10V
5.0
8.0
CPD
Power Dissipation Capacitance
(Note 5)
40
pF


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