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MM74C73 Datasheet(PDF) 4 Page - Fairchild Semiconductor

Part No. MM74C73
Description  Dual J-K Flip-Flops with Clear and Preset
Download  7 Pages
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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MM74C73 Datasheet(HTML) 4 Page - Fairchild Semiconductor

   
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4
AC Electrical Characteristics (Note 3)
TA = 25°C, CL = 50 pF, unless otherwise noted
Note 3: AC Parameters are guaranteed by DC correlated testing.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
CIN
Input Capacitance
Any Input
5
pF
tpd0, tpd1
Propagation Delay Time to a
VCC = 5V
180
300
ns
Logical “0” or Logical “1” from
VCC = 10V
70
110
ns
Clock to Q or Q
tpd0
Propagation Delay Time to a
VCC = 5V
200
300
ns
Logical “0” from Preset or Clear
VCC = 10V
80
130
ns
tpd
Propagation Delay Time to a
VCC = 5V
200
300
ns
Logical “1” from Preset or Clear
VCC = 10V
80
130
ns
tS
Time Prior to Clock Pulse that
VCC = 5V
110
175
ns
Data must be Present
VCC = 10V
45
70
ns
tH
Time after Clock Pulse that J
VCC = 5V
−40
0
ns
and K must be Held
VCC = 10V
−20
0
ns
tPW
Minimum Clock Pulse Width
VCC = 5V
120
190
ns
tWL = tWH
VCC = 10V
50
80
ns
tPW
Minimum Preset and Clear
VCC = 5V
90
130
ns
Pulse Width
VCC = 10V
40
60
ns
tMAX
Maximum Toggle Frequency
VCC = 5V
2.5
4
MHz
VCC = 10V
7
11
MHz
tr, tf
Clock Pulse Rise and Fall Time
VCC = 5V
15
µs
VCC = 10V
5
µs


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