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MM74C192 Datasheet(PDF) 3 Page - Fairchild Semiconductor

Part No. MM74C192
Description  Synchronous 4-Bit Up/Down Decade Counter . Synchronous 4-Bit Up/Down Binary Counter
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Maker  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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MM74C192 Datasheet(HTML) 3 Page - Fairchild Semiconductor

   
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AC Electrical Characteristics (Note 2)
TA = 25°C, CL = 50 pF, unless otherwise noted
Note 2: AC Parameters are guaranteed by DC correlated testing.
Note 3: Capacitance is guaranteed by periodic testing.
Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see Application Note AN-90.
Cascading Packages
Guaranteed Noise Margin
as a Function of VCC
Symbol
Parameter
Conditions
Min
Typ
Max
Units
tpd
Propagation Delay
VCC = 5V
250
400
ns
Time to Q from Count Up or Down
VCC = 10V
100
160
ns
tpd
Propagation Delay
VCC = 5V
120
200
ns
Time to Q Borrow from Count Down
VCC = 10V
50
80
ns
tpd
Propagation Delay
VCC = 5V
120
200
ns
Time to Carry from Count Up
VCC = 10V
50
80
ns
tS
Time Prior to Load
VCC = 5V
100
160
ns
that Data Must be Present
VCC = 10V
30
50
ns
tW
Minimum Clear Pulse Width
VCC = 5V
300
480
ns
VCC = 10V
120
190
ns
tW
Minimum Load Pulse Width
VCC = 5V
100
160
ns
VCC = 10V
40
65
ns
tpd0
Propagation Delay
VCC = 5V
300
480
ns
tpd1
Time to Q from Load
VCC = 10V
120
190
ns
tW
Minimum Count Pulse Width
VCC = 5V
120
200
ns
VCC = 10V
35
80
ns
fMAX
Maximum Count Frequency
VCC = 5V
2.5
4
MHz
VCC = 10V
6
10
MHz
tr
Count Rise and Fall Time
VCC = 5V
15
µs
tf
VCC = 10V
5
µs
CIN
Input Capacitance
(Note 3)
5
pF
CPD
Power Dissipation Capacitance
(Note 4)
100
pF


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