ML4826

PRODUCT SPECIFICATION

2

REV. 1.0.5 2/14/02

Pin Configuration

Pin Description

PIN

NAME

FUNCTION

1

IEAO

PFC transconductance current error amplifier output

PFC gain control reference input

Current sense input to the PFC current limit comparator

Input for PFC RMS line voltage compensation

5

SS

Connection point for the PWM soft start capacitor

PWM voltage feedback input

Connection for oscillator frequency setting components

8

RAMP 1

PFC ramp input

9

RAMP 2

When in current mode, this pin functions as the current sense input; when in voltage mode,

it is the PWM input from the PFC output (feedforward ramp)

10

PWM current limit comparator input

11

AGND

Analog signal ground

12

PGND

Return for the PWM totem-pole outputs

13

PWM 2

PWM driver 2 output

14

PWM 1

PWM drive 1 output

15

PFC OUT

PFC driver output

16

Positive supply for the PWM drive outputs

17

Positive supply (connected to an internal shunt regulator).

18

Buffered output for the internal 7.5V reference

19

PFC transconductance voltage error amplifier input

20

VEAO

PFC transconductance voltage error amplifier output

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

IEAO

SS

RAMP 1

RAMP 2

VEAO

PFC OUT

PWM 1

PWM 2

PGND

AGND

TOP VIEW

ML4826

20-Pin PDIP (P20)