STM1810/1811/1812/1813/1815/1816/1817/1818

Operation

Doc ID11464 Rev 8

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2

Operation

2.1

Reset output

105 °C). A microcontroller’s (MCU) reset input starts the MCU in a known state. The

STM1810 - STM1813/ STM1815 - STM1818 low power reset circuits assert reset to prevent

code-execution errors during power-up, power-down, and brownout conditions (Figure 7).

(STM1813/STM1818), following a low signal of 1.5 µs minimum duration.

2.2

Push-button detect reset (STM1813/1818)

Many systems require push-button reset capability (Figure 8), allowing the user or external

logic circuitry to initiate reset. On the STM1813/STM1818, a logic low on RST held for

greater than 1.5 µs asserts a reset. RST deasserts following a 100 ms minimum reset time-

100 ms minimum reset time-out delay. To facilitate use with mechanical switches, the

STM1813/STM1818 contain internal debounce circuitry. A debounced waveform is shown in

Figure 9 The RST output has an internal 5.5 k

Ω pull-up resistor.

2.3

Interfacing to bidirectional microcontrollers (MCU’s)

As the RST output on the STM1811/STM1816 is open-drain, these devices interface easily

with MCU’s that have bidirectional reset pins. Connecting the µP supervisor’s reset (RST)

output directly to the microcontroller’s reset (RST) pin allows either device to assert reset

(Figure 10). No external pull-up resistor is required, as it is within the STM1811/STM1816.

2.4

shows typical transient duration versus reset comparator overdrive (for which the STM181x

will NOT generate a reset pulse). The graph was generated using a negative pulse applied

magnitude indicated (comparator overdrive). The graph indicates the maximum pulse width

transient increases (further below the threshold), the maximum allowable pulse width

decreases. Any combination of duration and overdrive which lies under the curve will NOT

threshold and lasts 20 µs or less will not cause a reset pulse. A 0.1 µF bypass capacitor