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EPF10K50V Datasheet(PDF) 99 Page - Altera Corporation |
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EPF10K50V Datasheet(HTML) 99 Page - Altera Corporation |
99 / 128 page Altera Corporation 99 FLEX 10K Embedded Programmable Logic Device Family Data Sheet Notes to tables: (1) All timing parameters are described in Tables 32 through 38 in this data sheet. (2) Using an LE to register the signal may provide a lower setup time. (3) This parameter is specified by characterization. Tables 85 through 91 show EPF10K10A device internal and external timing parameters. Table 85. EPF10K10A Device LE Timing Microparameters Note (1) Symbol -1 Speed Grade -2 Speed Grade -3 Speed Grade Unit Min Max Min Max Min Max tLUT 0.9 1.2 1.6 ns tCLUT 1.2 1.4 1.9 ns tRLUT 1.9 2.3 3.0 ns tPACKED 0.6 0.7 0.9 ns tEN 0.5 0.6 0.8 ns tCICO 02 0.3 0.4 ns tCGEN 0.7 0.9 1.1 ns tCGENR 0.7 0.9 1.1 ns tCASC 1.0 1.2 1.7 ns tC 1.2 1.4 1.9 ns tCO 0.5 0.6 0.8 ns tCOMB 0.5 0.6 0.8 ns tSU 1.1 1.3 1.7 ns tH 0.6 0.7 0.9 ns tPRE 0.5 0.6 0.9 ns tCLR 0.5 0.6 0.9 ns tCH 3.0 3.5 4.0 ns tCL 3.0 3.5 4.0 ns Table 86. EPF10K10A Device IOE Timing Microparameters Note (1) (Part 1 of 2) Symbol -1 Speed Grade -2 Speed Grade -3 Speed Grade Unit Min Max Min Max Min Max 1.3 1.5 2.0 ns tIOC 0.2 0.3 0.3 ns tIOCO 0.2 0.3 0.4 ns tIOCOMB 0.6 0.7 0.9 ns tIOSU 0.8 1.0 1.3 ns |
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Similar Description - EPF10K50V |
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