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AD1849KPZ Datasheet(PDF) 10 Page - Analog Devices |
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AD1849KPZ Datasheet(HTML) 10 Page - Analog Devices |
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10 / 28 page  AD1849K REV. A –10– The loopback modes are shown graphically in Figure 3. GAIN MONITOR DISABLE 0 1 AD1849K LINE, MIC INPUT DISCONNECTED SDTX SDRX LINE 0, OUTPUT LINE 1 FUNCTIONAL A/D /A-LAW ENCODE /A-LAW DECODE D/A MUTE Analog Loopback D-A-D GAIN MONITOR AD1849K LINE, MIC INPUT SDTX SDRX LINE 0, LINE 1 OUTPUT FUNCTIONAL A/D /A-LAW ENCODE D/A MUTE /A-LAW ENCODE Digital Loopback D-D Figure 3. Loopback Modes Clocks and Sample Rates The AD1849K can operate from external crystals, from a 256 × FS input clock, from an input clock with a programmable divide factor, or from the serial port’s bit clock (at 256 × F S), selected under software control. Two crystal inputs are provided to generate a wide range of sample rates. The oscillators for these crystals are on the AD1849K, as is a multiplexer for selecting between them. They can be overdriven with external clocks by the user, if so desired. The recommended crystal frequencies are 16.9344 MHz and 24.576 MHz. From them the following sample rates can be internally generated: 5.5125, 6.615, 8, 9.6, 11.025, 16, 18.9, 22.05, 27.42857, 32, 33.075, 37.8, 44.1, 48 kHz. Regardless of clock input source, a clock output of 256 × F S is generated (with some skew). If an external input clock or the serial port’s bit clocks are selected to drive the AD1849K’s internal operation, they should be low jitter clocks. If no external clock will be used, Analog Devices recommends tying the clock input pin (CLKIN) to ground. If either external crystal is not used, Analog Devices recommends tying its input (CIN1 and/or CIN2) to ground. |
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