R07DS0581EJ0200 Rev.2.00

Page 1 of 7

Apr 13, 2012

RJF0611JPD

Silicon N Channel MOS FET Series

Power Switching

Description

This FET has the over temperature shut-down capability sensing to the junction temperature. This FET has the built-in

over temperature shut-down circuit in the gate area. And this circuit operation to shut-down the gate voltage in case of

high junction temperature like applying over power consumption, over current etc..

Features

 Logic level operation (4 V Gate drive).

 Built-in the over temperature shut-down circuit.

 High endurance capability against to the short circuit.

 Latch type shut down operation (need 0 voltage recovery).

 Built-in the current limitation circuit.

 Power supply voltage applies 12 V and 24 V.

 AEC-Q101 Compliant

Outline

RENESAS Package code: PRSS0004ZD-C

(Package name: DPAK (S) )

1

2

3

4

D

S

G

Gate Resistor

Temperature

Sensing

Circuit

Latch

Circuit

Gate

Shut-down

Circuit

Current

Limitation

Circuit

1. Gate

2. Drain

3. Source

4. Drain

Absolute Maximum Ratings

(Ta = 25°C)

Item

Symbol

Ratings

Unit

Drain to source voltage

60

V

Gate to source voltage

16

V

Gate to source voltage

–2.5

V

Drain current

Note3

30

A

Body-drain diode reverse drain current

30

A

Avalanche current

Note 2

6.7

A

Avalanche energy

Note 2

192

mJ

Channel dissipation

Pch

Note 1

40

W

Channel temperature

Tch

150

C

Storage temperature

Tstg

–55 to +150

C

Notes: 1. Value at Tc = 25

C

2. Tch = 25

C, Rg  50 

3. It provides by the current limitation lower bound value.

R07DS0581EJ0200

Rev.2.00

Apr 13, 2012