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HMT451V7AFR8C Datasheet(PDF) 7 Page - Hynix Semiconductor

Part # HMT451V7AFR8C
Description  DDR3 SDRAM VLP Registered DIMM Based on 4Gb A-die
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Manufacturer  HYNIX [Hynix Semiconductor]
Direct Link  http://www.skhynix.com/kor/main.do
Logo HYNIX - Hynix Semiconductor

HMT451V7AFR8C Datasheet(HTML) 7 Page - Hynix Semiconductor

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Rev. 1.0 / May. 2013
7
DQS[17:0]
I/O
Positive
Edge
Positive line of the differential data strobe for input and output data.
DQS[17:0]
I/O
Negative
Edge
Negative line of the differential data strobe for input and output data.
TDQS[17:9]
TDQS[17:9]
OUT
TDQS/TDQS is applicable for X8 DRAMs only. When enabled via Mode Register A11=1 in
MR1,DRAM will enable the same termination resistance function on TDQS/TDQS that is
applied to DQS/DQS. When disabled via mode register A11=0 in MR1, DM/TDQS will
provide the data mask function and TDQS is not used. X4 DRAMs must disable the TDQS
function via mode register A11=0 in MR1
SA[2:0]
IN
These signals are tied at the system planar to either VSS or VDDSPD to configure the
serial SPD EEPROM address range.
SDA
I/O
This bidirectional pin is used to transfer data into or out of the SPD EEPROM. A resistor
must be connected from the SDA bus line to VDDSPD on the system planar to act as a
pullup.
SCL
IN
This signal is used to clock data into and out of the SPD EEPROM. A resistor may be con-
nected from the SCL bus time to VDDSPD on the system planar to act as a pullup.
EVENT
OUT
(open
drain)
Active Low
This signal indicates that a thermal event has been detected in the thermal sensing
device.The system should guarantee the electrical level requirement is met for the
EVENT pin on TS/SPD part.
No pull-up resister is provided on DIMM.
VDDSPD
Supply
Serial EEPROM positive power supply wired to a separate power pin at the connector
which supports from 3.0 Volt to 3.6 Volt (nominal 3.3V) operation.
RESET
IN
The RESET pin is connected to the RESET pin on the register and to the RESET pin on
the DRAM.
Par_In
IN
Parity bit for the Address and Control bus. (“1 “: Odd, “0 “: Even)
Err_Out
OUT
(open
drain)
Parity error detected on the Address and Control bus. A resistor may be connected from
Err_Out bus line to VDD on the system planar to act as a pull up.
TEST
Used by memory bus analysis tools (unused (NC) on memory DIMMs)
Symbol
Type
Polarity
Function


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