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BQ34Z950 Datasheet(PDF) 12 Page - Texas Instruments |
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BQ34Z950 Datasheet(HTML) 12 Page - Texas Instruments |
12 / 28 page DQ (R/W1) DQ (R/W0) DQ (BREAK) t (STRH) t (STRB) t (DSU) t (SSU) t (CYCH),t ,t (CYCB) (B) t (DH) t (SH) t (DV) t (BR) t (SV) T0269-01 bq34z950 SLUSBF0A – APRIL 2013 – REVISED MAY 2013 www.ti.com DQ 1-WIRE INTERFACE DQ TIMING SPECIFICATIONS VDD = 2.4 V to 2.6 V, TA = –40°C to 85°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT t(CYCH) Cycle time, host to bq34z950 See (1) 3 ms t(CYCB) Cycle time, bq34z950 to host 3 6 ms t(STRH) Start hold, host to bq34z950 5 ns t(STRB) Start hold, bq34z950 to host 500 750 μs t(DSU) Data setup μs t(DH) Data hold 750 μs t(DV) Data valid 1.5 ms t(SSU) Stop setup 2.25 ms t(SH) Stop hold 700 μs t(SV) Stop valid 2.95 ms t(B) Break 3 ms t(BR) Break recovery 1 ms (1) The open-drain DQ pin should be pulled to at least VCC by the host system for proper DQ operation. DQ may be left floating if the serial interface is not used. Figure 2. DQ Timing Diagram DQ timing for this device is selectable by adjusting values in Data Flash Sub Class 0x113. See Figure 3 for an overview of the flash values. 12 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: bq34z950 |
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