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P1AFS1500-QN484 Datasheet(PDF) 60 Page - Microsemi Corporation

Part No. P1AFS1500-QN484
Description  Fusion Family of Mixed Signal FPGAs
Download  334 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

P1AFS1500-QN484 Datasheet(HTML) 60 Page - Microsemi Corporation

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Device Architecture
2-44
Revision 4
Flash Memory Block Diagram
A simplified diagram of the flash memory block is shown in Figure 2-33.
The logic consists of the following sub-blocks:
Flash Array
Contains all stored data. The flash array contains 64 sectors, and each sector contains 33 pages
of data.
Page Buffer
A page-wide volatile register. A page contains 8 blocks of data and an AUX block.
Block Buffer
Contains the contents of the last block accessed. A block contains 128 data bits.
ECC Logic
The FB stores error correction information with each block to perform single-bit error correction and
double-bit error detection on all data blocks.
Figure 2-33 • Flash Memory Block Diagram
ADDDR[17:0]
DATAWIDTH[1:0]
REN
READNEXT
PAGESTATUS
WEN
ERASEPAGE
PROGRAM
SPAREPAGE
AUXBLOCK
UNPROTECTPAGE
OVERWRITEPAGE
DISCARDPAGE
OVERWRITEPROTECT
PAGELOSSPROTECT
PIPE
LOCKREQUEST
CLK
RESET
STATUS[1:0]
BUSY
Control
Logic
Output
MUX
Block Buffer
(128 bits)
ECC
Logic
Flash Array = 64 Sectors
RD[31:0]
WD[31 :0]
Page Buffer = 8 Blocks
Plus AUX Block


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