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P1AFS1500-PQ256 Datasheet(PDF) 94 Page - Microsemi Corporation

Part No. P1AFS1500-PQ256
Description  Fusion Family of Mixed Signal FPGAs
Download  334 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

P1AFS1500-PQ256 Datasheet(HTML) 94 Page - Microsemi Corporation

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Device Architecture
2-78
Revision 4
Timing Characteristics
Table 2-35 • FIFO
Commercial Temperature Range Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V
Parameter
Description
–2
–1
Std.
Units
tENS
REN, WEN Setup time
1.34
1.52
1.79
ns
tENH
REN, WEN Hold time
0.00
0.00
0.00
ns
tBKS
BLK Setup time
0.19
0.22
0.26
ns
tBKH
BLK Hold time
0.00
0.00
0.00
ns
tDS
Input data (WD) Setup time
0.18
0.21
0.25
ns
tDH
Input data (WD) Hold time
0.00
0.00
0.00
ns
tCKQ1
Clock High to New Data Valid on RD (flow-through)
2.17
2.47
2.90
ns
tCKQ2
Clock High to New Data Valid on RD (pipelined)
0.94
1.07
1.26
ns
tRCKEF
RCLK High to Empty Flag Valid
1.72
1.96
2.30
ns
tWCKFF
WCLK High to Full Flag Valid
1.63
1.86
2.18
ns
tCKAF
Clock High to Almost Empty/Full Flag Valid
6.19
7.05
8.29
ns
tRSTFG
RESET Low to Empty/Full Flag Valid
1.69
1.93
2.27
ns
tRSTAF
RESET Low to Almost-Empty/Full Flag Valid
6.13
6.98
8.20
ns
tRSTBQ
RESET Low to Data out Low on RD (flow-through)
0.92
1.05
1.23
ns
RESET Low to Data out Low on RD (pipelined)
0.92
1.05
1.23
ns
tREMRSTB
RESET Removal
0.29
0.33
0.38
ns
tRECRSTB
RESET Recovery
1.50
1.71
2.01
ns
tMPWRSTB
RESET Minimum Pulse Width
0.21
0.24
0.29
ns
tCYC
Clock Cycle time
3.23
3.68
4.32
ns
FMAX
Maximum Frequency for FIFO
310
272
231
ns
Note: For the derating values at specific junction temperature and voltage supply levels, refer to Table 3-7 on
page 3-9.


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