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P1AFS1500-PQ256 Datasheet(PDF) 37 Page - Microsemi Corporation

Part No. P1AFS1500-PQ256
Description  Fusion Family of Mixed Signal FPGAs
Download  334 Pages
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Manufacturer  MICROSEMI [Microsemi Corporation]
Direct Link  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

P1AFS1500-PQ256 Datasheet(HTML) 37 Page - Microsemi Corporation

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Fusion Family of Mixed Signal FPGAs
Revision 4
2-21
Crystal Oscillator
The Crystal Oscillator (XTLOSC) is source that generates the clock from an external crystal. The output
of XTLOSC CLKOUT signal can be selected as an input to the PLL. Refer to the "Clock Conditioning
Circuits" section for more details. The XTLOSC can operate in normal operations and Standby mode
(RTC is running and 1.5 V is not present).
In normal operation, the internal FPGA_EN signal is '1' as long as 1.5 V is present for VCC. As such,
the internal enable signal, XTL_EN, for Crystal Oscillator is enabled since FPGA_EN is asserted. The
XTL_MODE has the option of using MODE or RTC_MODE, depending on SELMODE.
During Standby, 1.5 V is not available, as such, and FPGA_EN is '0'. SELMODE must be asserted in
order for XTL_EN to be enabled; hence XTL_MODE relies on RTC_MODE. SELMODE and RTC_MODE
must be connected to RTCXTLSEL and RTCXTLMODE from the AB respectively for correct operation
during Standby (refer to the "Real-Time Counter System" section on page 2-33 for a detailed
description).
The Crystal Oscillator can be configured in one of four modes:
RC network, 32 KHz to 4 MHz
Low gain, 32 to 200 KHz
Medium gain, 0.20 to 2.0 MHz
High gain, 2.0 to 20.0 MHz
In RC network mode, the XTAL1 pin is connected to an RC circuit, as shown in Figure 2-16 on
page 2-19. The XTAL2 pin should be left floating. The RC value can be chosen based on Figure 2-18 for
any desired frequency between 32 KHz and 4 MHz. The RC network mode can also accommodate an
external clock source on XTAL1 instead of an RC circuit.
In Low gain, Medium gain, and High gain, an external crystal component or ceramic resonator can be
added onto XTAL1 and XTAL2, as shown in Figure 2-16 on page 2-19. In the case where the Crystal
Oscillator block is not used, the XTAL1 pin should be connected to GND and the XTAL2 pin should be left
floating.
Note: *Internal signal—does not exist in macro.
Figure 2-17 • XTLOSC Macro
XT LOSC
CLKOUT
XT L
0
1
MODE[1:0]
RTC_MODE[1:0]
SELMODE
FPGA_EN*
XTL_EN*
XTL_MODE*


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