P1AFS600-FG256PP datasheet(97/334 Pages) MICROSEMI

Part #	P1AFS600-FG256PP

Description	Fusion Family of Mixed Signal FPGAs

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Manufacturer	MICROSEMI [Microsemi Corporation]

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Fusion Family of Mixed Signal FPGAs

Revision 4

2-81

Table 2-36 describes each pin in the Analog Block. Each function within the Analog Block will be

explained in detail in the following sections.

Table 2-36 • Analog Block Pin Description

Signal Name

Number

of Bits

Direction

Function

Location of

Details

VAREF

1

Input/Output Voltage reference for ADC

ADC

ADCGNDREF

1

Input

External ground reference

ADC

MODE[3:0]

4

Input

ADC operating mode

ADC

SYSCLK

1

Input

External system clock

TVC[7:0]

8

Input

Clock divide control

ADC

STC[7:0]

8

Input

Sample time control

ADC

ADCSTART

1

Input

Start of conversion

ADC

PWRDWN

1

Input

ADC comparator power-down if 1.

When asserted, the ADC will stop

functioning, and the digital portion of

the

analog

block

will

continue

operating. This may result in invalid

status flags from the analog block.

Therefore,

Microsemi

does

not

recommend asserting the PWRDWN

pin.

ADC

ADCRESET

1

Input

ADC resets and disables Analog Quad

– active high

ADC

BUSY

1

Output

1 – Running conversion

ADC

CALIBRATE

1

Output

1 – Power-up calibration

ADC

DATAVALID

1

Output

1 – Valid conversion result

ADC

RESULT[11:0]

12

Output

Conversion result

ADC

TMSTBINT

1

Input

Internal temp. monitor strobe

ADC

SAMPLE

1

Output

1 – An analog signal is actively being

sampled (stays high during signal

acquisition only)

0 – No analog signal is being sampled

ADC

VAREFSEL

1

Input

0 = Output internal voltage reference

(2.56 V) to VAREF

1 = Input external voltage reference

from VAREF and ADCGNDREF

ADC

CHNUMBER[4:0]

5

Input

Analog input channel select

Input

multiplexer

ACMCLK

1

Input

ACM clock

ACM

ACMWEN

1

Input

ACM write enable – active high

ACM

ACMRESET

1

Input

ACM reset – active low

ACM

ACMWDATA[7:0]

8

Input

ACM write data

ACM

ACMRDATA[7:0]

8

Output

ACM read data

ACM

ACMADDR[7:0]

8

Input

ACM address

ACM

CMSTB0 to CMSTB9

10

Input

Current monitor strobe – 1 per quad,

active high

Analog Quad

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