Page No. : 6/11

DS-RS2051-09 No v, 2010

www.Orister.com

Internal Synchronized Slope Compensation

Although there are more advantages of the current mode control than conventional voltage mode control, there are still several

drawbacks of peak-sensing current-mode converter, especially the open loop instability when it operates in higher than 50% of

the duty-cycle. To solve this problem, the RS2051 is introduced an internal slope compensation adding voltage ramp to the

current sense input voltage for PWM generation. It improves the close loop stability greatly at CCM, prevents the sub-harmonic

oscillation and thus reduces the output ripple voltage.

DUTY

4389

.

0

DUTY

DUTY

33

.

0

V

MAX

SLOP

×

=

×

=

Slope Compensation

Current Sensing & Dynamic peak limiting

to the internal reference voltage, and controls the reverse of the internal register, limits the peak current IMAX of the primary of

the transformer. The transformer energy is

2

MAX

I

L

2

1

E

×

×

=

the power supple. The current flowing by the power MOSFET has an extra value (

D

P

IN

T

L

V

I

×

=

Δ

) due to the system delay time

output power is a constant for universal input AC voltage, there is a dynamic peak limit circuit to compensate the system delay T

that the system delay brings on.

1.10

Duty Cycle

Vsense

0.65

0.70

0.75

0.80

0.85

0.90

0.95

1.00

1.05

10%20%30%40%50%60%70%80%90%

0%

Frequency Jiggling for EMI improvement

The Frequency Jiggling Technique is introduced in the RS2051. As following figure, the internal oscillation frequency is

modulated by itself. A whole surge cycle includes 128 pulses and the Jiggling ranges from -4% to +4%. Thus, the function could

minimize the electromagnetic interferer from the power supply module.

60K

65K

70K

Time

Frequency(HZ)

Frequency Jiggling for EMI