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RS2042 Datasheet(PDF) 4 Page - Orister Corporation |
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RS2042 Datasheet(HTML) 4 Page - Orister Corporation |
4 / 8 page Page No. : 4/8 DS-RS2042-03 Dec, 2008 www.Orister.com OPERATION DESCRIPTION Start-Up Current & Operating Current The typical start-up current is only 8μA. This allows a high resistance, low-wattage start-up resistor to be used, to minimize power loss. A 1.5MOhms, 0.25W, start-up resistor and a 10μF/40V VDD hold-up capacitor would be sufficient for an AC/DC adapter with a universal input range. The required operating current has been reduced to 3.4mA. This results in higher efficiency and reduces the VDD hold-up capacitance requirement. Green-Power Mode Operation The proprietary green-power mode function provides off-time modulation to continuously decrease the PWM frequency under light-load conditions. To avoid acoustic-noise problem, the minimum PWM frequency set above 25KHz. This green-power mode function dramatically reduces power consumption under light-load and zero-load conditions. Power supplies using a RS2042 controller can easily meet even the most restrictive international regulations regarding standby power consumption. Oscillator Operation A resistor connected from the RI pin to GND pin generates a constant current source for the RS2042 controller. This current is used to determine the center PWM frequency. Increasing the resistance will reduce PWM frequency. Using a 26KΩ resistor RI results in a corresponding 67KHz PWM frequency. The relationship between RI and the switching frequency is: ) ( ) ( 1742 KHz K R f I PWM RS2042 also integrates frequency Jiggling function internally. The frequency variation ranges from around 63KHz to 70KHz for a center frequency 67kHz. The frequency jittering function helps reduce EMI emission of a power supply with minimum line filters. 26 * ) ( 70 K R A I I RT Leading Edge Blanking Each time the power MOSFET is switched on, a turn-on spike will inevitably occur at the sense-resistor. To avoid premature termination of the switching pulse, a leading-edge blanking time is built in. During this blanking period, the current-limit comparator is disabled, and it cannot switch off the gate drive. Under-Voltage Lockout (UVLO) The turn-on/turn-off thresholds are fixed internally at 12.4V/16.5V. To enable a RS2042 controller during start-up, the hold-up capacitor must first be charged to 16.5V through the start-up resistor. The hold-up capacitor will continue to supply VDD before energy can be delivered from the auxiliary winding of the main transformer. VDD must not drop below 12.4V during this start-up process. This UVLO hysteresis window ensures that the hold-up capacitor can adequately supply VDD during start-up. Gate Output / Soft Driving The RS2042 output stage is a fast totem pole gate driver. Cross-conduction has been avoided to minimize heat dissipation, increase efficiency, and enhance reliability. The output driver is clamped by an internal 18V Zener diode in order to protect the power MOSFET transistors from any harmful over-voltage gate signals. A soft driving waveform is implemented to minimize EMI. |
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Similar Description - RS2042_08 |
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