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TLV5636CD Datasheet(PDF) 4 Page - Texas Instruments |
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TLV5636CD Datasheet(HTML) 4 Page - Texas Instruments |
4 / 22 page www.ti.com ELECTRICAL CHARACTERISTICS TLV5636 SLAS223C – JUNE 1999 – REVISED APRIL 2004 over recommended operating free-air temperature range, supply voltages, and reference voltages (unless otherwise noted) STATIC DAC SPECIFICATIONS PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Resolution 12 Bits INL Integral nonlinearity See note(1) ±2 ±4 LSB DNL Differential nonlinearity See note(2) ±0.5 ±1 LSB EZS Zero-scale error (offset error at zero scale) See note(3) ±20 mV EZS TC Zero-scale-error temperature coefficient See note (4) 10 µV/°C % of FS EG Gain error See note (5) ±0.6 voltage EG TC Gain error temperature coefficient See note (6) 10 ppm/°C (1) The relative accuracy or integral nonlinearity (INL) sometimes referred to as linearity error, is the maximum deviation of the output from the line between zero and full scale excluding the effects of zero code and full-scale errors. Tested from code 10 to code 4095. (2) The differential nonlinearity (DNL) sometimes referred to as differential error, is the difference between the measured and ideal 1 LSB amplitude change of any two adjacent codes. Monotonic means the output voltage changes in the same direction (or remains constant) as a change in the digital input code. Tested from code 10 to code 4095. (3) Zero-scale error is the deviation from zero voltage output when the digital input code is zero. (4) Zero-scale-error temperature coefficient is given by: EZS TC = [EZS (Tmax) - EZS (Tmin)]/Vref x 106/(Tmax - Tmin). (5) Gain error is the deviation from the ideal output (2Vref - 1 LSB) with an output load of 10 kΩ excluding the effects of the zero-error. (6) Gain error temperature coefficient is given by: EG TC = [EG(Tmax) - EG (Tmin)]/Vref x 106/(Tmax - Tmin). OUTPUT SPECIFICATIONS PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VO Voltage output range RL = 10 kΩ 0 VDD - 0.4 V % of FS Output load regulation accuracy VO = 4.096 V, 2.048 V, RL= 2 kΩ ±0.25 voltage REFERENCE PIN CONFIGURED AS OUTPUT (REF) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Vref(OUTL) Low reference voltage 1.003 1.024 1.045 V Vref(OUTH) High reference voltage VDD > 4.75 V 2.027 2.048 2.068 V Iref(source) Output source current 1 mA Iref(sink) Output sink current -1 mA Load capacitance 100 pF PSRR Power supply rejection ratio -65 dB REFERENCE INPUT CONFIGURED AS INPUT (REF) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VI Input voltage 0 VDD - 1.5 V Ri Input resistance 10 k Ω Ci Input capacitance 5 pF Fast 1.3 Reference input bandwidth REF = 0.2 Vpp + 1.024 V dc MHz Slow 525 Reference feed through REF = 1 Vpp at 1 kHz + 1.024 V dc(1) -80 dB (1) Reference feedthrough is measured at the DAC output with an input code = 0x000. DIGITAL INPUT PARAMETER TEST CONDITIONS MIN TYP MAX UNIT IIH High-level digital input current VI = VDD 1 µA IIL Low-level digital input current VI = 0 V -1 µA Ci Input capacitance 8 pF 4 |
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