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OR2T10A-4M240 Datasheet(PDF) 10 Page - List of Unclassifed Manufacturers |
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10 / 192 page 10 Lucent Technologies Inc. Data Sheet ORCA Series 2 FPGAs June 1999 Programmable Logic Cells (continued) 5-2751(F).r3 Figure 8. F5M Mode—One Six-Input Variable Function F5M Mode—One Six-Input Variable Function The LUT can be used to implement any function of six- input variables. As shown in Figure 8, five input signals (A[4:0]) are routed into both the A[4:0] and B[4:0] ports, and the C0 port is used for the sixth input. The output port is F1. Ripple Mode The LUT can do nibble-wide ripple functions with high- speed carry logic. Each QLUT has a dedicated carry- out net to route the carry to/from the adjacent QLUT. Using the internal carry circuits, fast arithmetic and counter functions can be implemented in one PFU. Similarly, each PFU has carry-in (CIN) and carry-out (COUT) ports for fast-carry routing between adjacent PFUs. The ripple mode is generally used in operations on two 4-bit buses. Each QLUT has two operands and a ripple (generally carry) input, and provides a result and ripple (generally carry) output. A single bit is rippled from the previous QLUT and is used as input into the current QLUT. For QLUT0, the ripple input is from the PFU CIN port. The CIN data can come from either the fast-carry routing or the PFU input B4, or it can be tied to logic 1 or logic 0. The resulting output and ripple output are calculated by using generate/propagate circuitry. In ripple mode, the two operands are input into A[3:0] and B[3:0]. The four result bits, one per QLUT, are F[3:0] (see Figure 9). The ripple output from QLUT3 can be routed to dedi- cated carry-out circuitry into any of four adjacent PLCs, or it can be placed on the O4 PFU output, or both. This allows the PLCs to be cascaded in the ripple mode so that nibble-wide ripple functions can be expanded eas- ily to any length. 5-2756(F).r32 Figure 9. Ripple Mode The ripple mode can be used in one of four submodes. The first of these is adder/subtractor mode. In this mode, each QLUT generates two separate outputs. One of the two outputs selects whether the carry-in is to be propagated to the carry-out of the current QLUT or if the carry-out needs to be generated. The result of this selection is placed on the carry-out signal, which is connected to the next QLUT or the COUT signal, if it is the last QLUT (QLUT3). The other QLUT output creates the result bit for each QLUT that is connected to F[3:0]. If an adder/subtractor is needed, the control signal to select addition or sub- traction is input on A4. The result bit is created in one- half of the QLUT from a single bit from each input bus, along with the ripple input bit. These inputs are also used to create the programmable propagate. QLUT3 QLUT2 A4 A4 A3 A2 A1 A0 A3 A2 A1 A0 QLUT1 QLUT0 B4 B4 B3 B2 B1 B0 B3 B2 B1 B0 C0 F3 F0 F1 QLUT3 B3 B3 A3 A3 F3 QLUT2 B2 B2 A2 A2 F2 QLUT1 B1 B1 A1 A1 F1 QLUT0 B0 B0 A0 A0 F0 CIN CIN COUT COUT |
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