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IP1827 Datasheet(PDF) 34 Page - International Rectifier |
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IP1827 Datasheet(HTML) 34 Page - International Rectifier |
34 / 39 page iP1827 Highly Integrated 25A Single‐input Voltage, Synchronous Buck Regulator March 5, 2012 | V1.4 34 97599 AGnd PGnd GND Vin Vout SW Vin PGND LGND VOUT Vin PGND Figure 35b: IRDC1827 demoboard layout considerations – Bottom Layer GND AGND PGND Figure 35c: IRDC1827 demoboard layout considerations – Mid Layer 1 SW GND PGND Figure 35e: IRDC1827 demoboard layout considerations – Mid Layer 3 SW GND Vin VOUT Figure 35d: IRDC1827 demoboard layout considerations – Mid Layer 2 SW GND PGND Figure 35f: IRDC1827 demoboard layout considerations – Mid Layer 4 Remote sense traces, tapped at a low impedance node, such as across a capacitor, shielded by PGND layer are routed very close to each other and away from SW node All bypass caps (Marked in Cyan) should be placed as close as possible to their connecting pins |
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