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CHL8213-00CRT Datasheet(PDF) 1 Page - International Rectifier |
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CHL8213-00CRT Datasheet(HTML) 1 Page - International Rectifier |
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1 / 2 page  Digital Multi-Phase Buck Controller CHL8203/12/13/14 October 13, 2011 | FINAL | V1.3 1 FEATURES Dual output 2/3/4+1-phase PWM Controller (CHL8212/13/14) and single output 3-phase PWM Controller (CHL8203) Easiest layout and fewest pins in the industry Footprint compatible with CHL8225 (CHL8213/14) for analog and power signals Up to 3 VID select lines for dynamic voltage transitions Slow OCP for Thermal Design Current (TDC) protection Programmable I CRITICAL signal I2C interface for configuration & telemetry Pin programmable I2C address (CHL8203/13/14) Overclocking support with I2C voltage override and Vmax setting Flexible I2C bus security features I2C security enable pin (CHL8203/13/14) Independent loop switching frequencies from 200kHz to 1.2MHz per phase IR Efficiency Shaping with Dynamic Phase Control (DPC) 1-phase & Active Diode Emulation modes for light load efficiency IR Adaptive Transient Algorithm (ATA) on both loops minimizes output bulk capacitors and system cost Per-Loop Fault Protection: OVP, UVP, OCP Thermal Protection (OTP) and VRHOT# flag (CHL8203/13/14) Multiple time programmable (MTP) memory for custom configuration Compatible with IR ATL and 3.3V tri-state Drivers 3.3V +10%/-15% supply voltage; 0ºC to 85ºC operation Pb-Free, RoHS, QFN packages APPLICATIONS Multi-phase GPU Systems GDDR Memory DESCRIPTION The CHL8212/13/14 are dual-loop digital multi-phase buck controllers and the CHL8203 is a single-loop digital multiphase buck controller designed for GPU voltage regulation. Dynamic voltage control is provided by registers which are programmed through I2C and then selected using a 3-bit parallel bus for fast access. The CHL8203/12/13/14 include IR Efficiency Shaping Technology to deliver exceptional efficiency at minimum cost across the entire load range. IR Dynamic Phase Control adds/drops active phases based upon load current and can be configured to enter 1-phase operation and diode emulation mode automatically or by command. IR’s unique Adaptive Transient Algorithm (ATA), based on proprietary non-linear digital PWM algorithms, minimizes output bulk capacitors and Multiple Time Programmable (MTP) storage saves pins and enables a small package size. Device configuration and fault parameters are easily defined using the IR Digital Power Design Center (DPDC) GUI and stored in on-chip MTP. The CHL8203/12/13/14 provides extensive OVP, UVP, OCP and OTP fault protection and the CHL8203/13/14 includes thermistor based temperature sensing with VRHOT signal. The CHL8203/12/13/14 includes numerous features like register diagnostics for fast design cycles and platform differentiation, truly simplifying VRD design and enabling fastest time-to-market (TTM) with “set-and-forget” methodology. PIN DIAGRAM PWM_L2 VRTN RCSM VSEN PWM4 1/ NC 2 RCSP TSEN PWM3 V18A RRES VCC PWM2 PWM1 RCSM_L2 RCSP_L2 VPGM VRTN_L2 VSEN_L2 1 2 7 8 5 6 3 4 10 9 30 29 24 23 26 25 28 27 21 22 41 GND CHL8213/14 40 Pin 6x6 QFN Top View 12 16 14 19 13 17 15 20 18 11 39 35 37 32 38 34 36 31 33 40 1 CHL8214 2 CHL8213 VRRDY1 VRRDY2 Figure 1: CHL8213/14 Package Top View |
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