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SIC424 Datasheet(PDF) 5 Page - Vishay Siliconix |
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SIC424 Datasheet(HTML) 5 Page - Vishay Siliconix |
5 / 24 page Document Number: 63388 S13-0248-Rev. B, 04-Feb-13 www.vishay.com 5 Vishay Siliconix SiC414, SiC424 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 For technical questions, contact: powerictechsupport@vishay.com Notes: a. VIN UVLO is programmable using a resistor divider from VIN to ENL to AGND. The ENL voltage is compared to an internal reference. b. Guaranteed by design. c. The switch-over threshold is the maximum voltage differential between the VLDO and VOUT pins which ensures that VLDO will internally switch-over to VOUT. The non-switch-over threshold is the minimum voltage differential between the VLDO and VOUT pins which ensures that VLDO will not switch-over to VOUT. d. The LDO drop out voltage is the voltage at which the LDO output drops 2 % below the nominal regulation point. Power Good Power Good Threshold Voltage PG_VTH_UPPER Upper limit, VFB > internal reference 750 mV + 20 % Lower limit, VFB < internal reference 750 mV - 10 Start-Up Delay Time (between PWM enable and PGOOD high) PG_Td V5V = 5 V 4 ms V5V = 3 V 2 Fault (noise-immunity) Delay Timeb PG_ICC 5µs Power Good Leakage Current PG_ILK 1µA Power Good On-Resistance PG_RDS-ON 10 Fault Protection Valley Current Limit V5V = 5 V, RILIM = 5 k 34 5 A ILIM Source Current ILIM 8µA ILIM Comparator Offset Voltage VILM-LK With respect to AGND - 8 0 + 8 mV Output Under-Voltage Fault VOUV_Fault VFB with respect to Internal 750 mV reference, 8 consecutive clocks - 25 % Smart Power-Save Protection Threshold Voltageb PSAVE_VTH VFB with respect to internal 750 mV reference + 10 Over-Voltage Protection Threshold VFB with respect to internal 750 mV reference + 20 Over-Voltage Fault Delayb tOV-Delay 5µs Over Temperature Shutdownb TShut 10 °C hysteresis 150 °C Logic Inputs/Outputs Logic Input High Voltage VIH ENL 1 V Logic Input Low Voltage VIL 0.4 EN/PSV Input for PSAVE Operationb % of V5V 45 100 % EN/PSV Input for Forced Continuous Operationb 1V 42 EN/PSV Input for Disabling Switcher 00.4 V EN/PSV Input Bias Current IEN EN/PSV = V5V or AGND - 10 + 10 µA ENL Input Bias Current VIN = 28 V 11 18 FB Input Bias Current FBL_ILK FB = V5V or AGND - 1 + 1 Linear Dropout Regulator VLDO Accuracy VLDO_ACC VLDO load = 10 mA 4.9 5 5.1 V LDO Current Limit LDO_ILIM Start-up and foldback, VIN = 12 V 115 mA Operating current limit, VIN = 12 V 135 200 VLDO to VOUT Switch-Over Threshold c VLDO-BPS - 140 + 140 mV VLDO to VOUT Non-Switch-Over Threshold c VLDO-NBPS - 450 + 450 VLDO to VOUT Switch-Over Resistance RLDO VOUT = 5 V 2 LDO Drop Out Voltaged From VIN to VVLDO , VVLDO = 5 V, IVLDO = 100 mA 1.2 V ELECTRICAL SPECIFICATIONS Parameter Symbol Test Conditions Unless Specified VIN = 12 V, V5V = 5 V, TA = + 25 °C for typ., - 40 °C to + 85 °C for min. and max., TJ = < 125 °C Min. Typ. Max. Unit |
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