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ICS9UMS9610CKLFT Datasheet(PDF) 3 Page - Integrated Device Technology |
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ICS9UMS9610CKLFT Datasheet(HTML) 3 Page - Integrated Device Technology |
3 / 20 page IDTTM/ICSTM PC MAIN CLOCK 1336—07/21/08 ICS9UMS9610 PC MAIN CLOCK 3 Advance Information Pin Description (continued) PIN # PIN NAME TYPE DESCRIPTION Logic Level (V) Input Level Tolerance (V) 25 GNDSRC GND Ground pin for the SRC outputs 0 N/A 26 SRCC0_LPR OUT Complementary clock of differential 0.8V push-pull SRC output with integrated 33ohm series resistor. No 50ohm resistor to GND needed. 0.8 N/A 27 SRCT0_LPR OUT True clock of differential 0.8V push-pull SRC output with integrated 33ohm series resistor. No 50ohm resistor to GND needed. 0.8 N/A 28 *CR#1_1.5 IN 1.5V Clock request for SRC1, 0 = enable, 1 = disable 1.5 1.5 29 VDDCORE_1.5 PWR 1.5V power for the PLL core 1.5 1.5 30 VDDIO_1.5 PWR Power supply for low power differential outputs, nominal 1.5V. 1.5 1.5 31 SRCC1_LPR OUT Complementary clock of differential 0.8V push-pull SRC output with integrated 33ohm series resistor. No 50ohm resistor to GND needed. 0.8 N/A 32 SRCT1_LPR OUT True clock of differential 0.8V push-pull SRC output with integrated 33ohm series resistor. No 50ohm resistor to GND needed. 0.8 N/A 33 GNDSRC GND Ground pin for the SRC outputs 0 N/A 34 SRCC2_LPR OUT Complementary clock of differential 0.8V push-pull SRC output with integrated 33ohm series resistor. No 50ohm resistor to GND needed. 0.8 N/A 35 SRCT2_LPR OUT True clock of differential 0.8V push-pull SRC output with integrated 33ohm series resistor. No 50ohm resistor to GND needed. 0.8 N/A 36 *CR#2_1.5 IN 1.5V Clock request for SRC2, 0 = enable, 1 = disable 1.5 1.5 37 FSB_L_1.5 IN Low threshold input for CPU frequency selection. Refer to input electrical characteristics for Vil_FS and Vih_FS values. 1.5V Max input voltage. 1.5 1.5 38 CPUC2_LPR OUT Complementary clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm series resistor. No 50 ohm resistor to GND needed. 0.8 N/A 39 CPUT2_LPR OUT True clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm series resistor. No 50 ohm resistor to GND needed. 0.8 N/A 40 GNDCPU GND Ground pin for the CPU outputs 0 N/A 41 VDDIO_1.5 PWR Power supply for low power differential outputs, nominal 1.5V. 1.5 1.5 42 VDDCORE_1.5 PWR 1.5V power for the PLL core 1.5 1.5 43 CPUC1_LPR OUT Complementary clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm series resistor. No 50 ohm resistor to GND needed. 0.8 N/A 44 CPUT1_LPR OUT True clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm series resistor. No 50 ohm resistor to GND needed. 0.8 N/A 45 GNDCPU GND Ground pin for the CPU outputs 0 N/A 46 VDDIO_1.5 PWR Power supply for low power differential outputs, nominal 1.5V. 1.5 1.5 47 CPUC0_LPR OUT Complementary clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm series resistor. No 50 ohm resistor to GND needed. 0.8 N/A 48 CPUT0_LPR OUT True clock of differential pair 0.8V push-pull CPU outputs with integrated 33ohm series resistor. No 50 ohm resistor to GND needed. 0.8 N/A |
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