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STM8AF6248 Datasheet(PDF) 35 Page - STMicroelectronics

Part # STM8AF6248
Description  Automotive 8-bit MCU, with up to 32 Kbytes Flash, data EEPROM, 10-bit ADC, timers, LIN, SPI, I2C, 3 to 5.5 V
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM8AF6248 Datasheet(HTML) 35 Page - STMicroelectronics

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background image
STM8AF61xx, STM8AF62xx
Memory and register map
Doc ID 14952 Rev 6
35/89
0x00 5265
TIM1
TIM1_CCR1H
TIM1 capture/compare register 1 high
0x00
0x00 5266
TIM1_CCR1L
TIM1 capture/compare register 1 low
0x00
0x00 5267
TIM1_CCR2H
TIM1 capture/compare register 2 high
0x00
0x00 5268
TIM1_CCR2L
TIM1 capture/compare register 2 low
0x00
0x00 5269
TIM1_CCR3H
TIM1 capture/compare register 3 high
0x00
0x00 526A
TIM1_CCR3L
TIM1 capture/compare register 3 low
0x00
0x00 526B
TIM1_CCR4H
TIM1 capture/compare register 4 high
0x00
0x00 526C
TIM1_CCR4L
TIM1 capture/compare register 4 low
0x00
0x00 526D
TIM1_BKR
TIM1 break register
0x00
0x00 526E
TIM1_DTR
TIM1 dead-time register
0x00
0x00 526F
TIM1_OISR
TIM1 output idle state register
0x00
0x00 5270 to
0x00 52FF
Reserved area (147 bytes)
0x00 5300
TIM2
TIM2_CR1
TIM2 control register 1
0x00
0x00 5301
TIM2_IER
TIM2 interrupt enable register
0x00
0x00 5302
TIM2_SR1
TIM2 status register 1
0x00
0x00 5303
TIM2_SR2
TIM2 status register 2
0x00
0x00 5304
TIM2_EGR
TIM2 event generation register
0x00
0x00 5305
TIM2_CCMR1
TIM2 capture/compare mode register 1
0x00
0x00 5306
TIM2_CCMR2
TIM2 capture/compare mode register 2
0x00
0x00 5307
TIM2_CCMR3
TIM2 capture/compare mode register 3
0x00
0x00 5308
TIM2_CCER1
TIM2 capture/compare enable register
1
0x00
0x00 5309
TIM2_CCER2
TIM2 capture/compare enable register
2
0x00
0x00 530A
TIM2_CNTRH
TIM2 counter high
0x00
0x00 530B
TIM2_CNTRL
TIM2 counter low
0x00
00 530C0x
TIM2_PSCR
TIM2 prescaler register
0x00
0x00 530D
TIM2_ARRH
TIM2 auto-reload register high
0xFF
0x00 530E
TIM2_ARRL
TIM2 auto-reload register low
0xFF
0x00 530F
TIM2_CCR1H
TIM2 capture/compare register 1 high
0x00
0x00 5310
TIM2_CCR1L
TIM2 capture/compare register 1 low
0x00
0x00 5311
TIM2_CCR2H
TIM2 capture/compare reg. 2 high
0x00
0x00 5312
TIM2_CCR2L
TIM2 capture/compare register 2 low
0x00
0x00 5313
TIM2_CCR3H
TIM2 capture/compare register 3 high
0x00
Table 13.
General hardware register map (continued)
Address
Block
Register label
Register name
Reset
status


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