Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

R1QKA3636CB Datasheet(PDF) 6 Page - Renesas Technology Corp

Part # R1QKA3636CB
Description  36-Mbit DDRII SRAM 2-word Burst
Download  38 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R1QKA3636CB Datasheet(HTML) 6 Page - Renesas Technology Corp

Back Button R1QKA3636CB Datasheet HTML 2Page - Renesas Technology Corp R1QKA3636CB Datasheet HTML 3Page - Renesas Technology Corp R1QKA3636CB Datasheet HTML 4Page - Renesas Technology Corp R1QKA3636CB Datasheet HTML 5Page - Renesas Technology Corp R1QKA3636CB Datasheet HTML 6Page - Renesas Technology Corp R1QKA3636CB Datasheet HTML 7Page - Renesas Technology Corp R1QKA3636CB Datasheet HTML 8Page - Renesas Technology Corp R1QKA3636CB Datasheet HTML 9Page - Renesas Technology Corp R1QKA3636CB Datasheet HTML 10Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 6 / 38 page
background image
PAGE : 6
Rev. 0.09a : 2011.09.14
R1QHA36**CB* / R1QLA36**CB* Series
Notes:
1. R1Q2, R1Q3, R1Q4, R1Q5, R1Q6 series have C and /C pins. R1QA, R1QB, R1QC, R1QD,
R1QE, R1QF, R1QG, R1QH, R1QJ, R1QK, R1QL, R1QM, R1QN, R1QP series do not have C,
/C pins. In the series, K and /K are used as the output reference clocks instead of C and /C.
Therefore, hereafter, C and /C represent K and /K in this document.
Pin Descriptions
1
Notes
IEEE1149.1 clock input: 1.8 V I/O levels. This ball must be tied to V
SS if
the JTAG function is not used in the circuit.
Input
TCK
IEEE1149.1 test inputs: 1.8 V I/O levels. These balls may be left not
connected if the JTAG function is not used in the circuit.
Input
TMS
TDI
DLL/PLL disable: When low, this input causes the DLL/PLL to be
bypassed for stable, low frequency operation.
Input
/DOFF
Output clock: This clock pair provides a user-controlled means of tuning
device output data. The rising edge of /C is used as the output timing
reference for the first and third output data. The rising edge of C is used
as the output timing reference for second and fourth output data. Ideally,
/C is 180 degrees out of phase with C. C and /C may be tied high to
force the use of K and /K as the output reference clocks instead of having
to provide C and /C clocks. If tied high, C and /C must remain high and
not to be toggled during device operation. These balls cannot remain
V
REF level.
Input
C, /C
(II only)
Input clock: This input clock pair registers address and control inputs on
the rising edge of K, and registers data on the rising edge of K and the
rising edge of /K. /K is ideally 180 degrees out of phase with K. All
synchronous inputs must meet setup and hold times around the clock
rising edges. These balls cannot remain V
REF level.
Input
K, /K
Synchronous byte writes: When low, these inputs cause their respective
byte to be registered and written during WRITE cycles. These signals
are sampled on the same edge as the corresponding data and must meet
setup and hold times around the rising edges of K and /K for each of the
two rising edges comprising the WRITE cycle. See Byte Write Truth
Table for signal to data relationship.
Input
/BW
x
Synchronous read / write Input: When /LD is low, this input designates
the access type (READ when R-/W is high, WRITE when R-/W is low) for
the loaded address. R-/W must meet the setup and hold times around
the rising edge of K.
Input
R-/W
Synchronous load: This input is brought low when a bus cycle sequence
is to be defined. This definition includes address and READ / WRITE
direction. All transactions operate on a burst-of-four data (two clock
periods of bus activity).
Input
/LD
Synchronous address inputs: These inputs are registered and must meet
the setup and hold times around the rising edge of K. All transactions
operate on a burst-of-four words (two clock periods of bus activity). SA0
and SA1 are used as the lowest two address bits for burst READ and
burst WRITE operations permitting a random burst start address on 18
and 36 of DDR II (not II+) devices. These inputs are ignored when
device is deselected or once burst operation is in progress.
Input
SA
x
Descriptions
I/O type
Name
hinS=00111.0011.0011.0011.0011
---00111.0011.0011.0011.0011---
00111.0011.0011.0011.0011
---DDR
R10DS0162EJ0009


Similar Part No. - R1QKA3636CB

ManufacturerPart #DatasheetDescription
logo
Renesas Technology Corp
R1QKA3636CB RENESAS-R1QKA3636CB Datasheet
307Kb / 38P
   36-Mbit QDR II SRAM 4-word Burst
R1QKA3636CB RENESAS-R1QKA3636CB Datasheet
308Kb / 38P
   36-Mbit QDRII SRAM 4-word Burst
R1QKA3636CB RENESAS-R1QKA3636CB Datasheet
310Kb / 38P
   36-Mbit DDRII SRAM 2-word Burst
R1QKA3636CB RENESAS-R1QKA3636CB Datasheet
311Kb / 38P
   36-Mbit DDRII SRAM 2-word Burst
R1QKA3636CB RENESAS-R1QKA3636CB Datasheet
307Kb / 38P
   36-Mbit QDR II SRAM 4-word Burst
More results

Similar Description - R1QKA3636CB

ManufacturerPart #DatasheetDescription
logo
Renesas Technology Corp
R1Q4A3636B RENESAS-R1Q4A3636B Datasheet
222Kb / 26P
   36-Mbit DDRII SRAM 2-word Burst
R1QBA3636CBG RENESAS-R1QBA3636CBG Datasheet
311Kb / 38P
   36-Mbit DDRII SRAM 2-word Burst
R1QBA3636CBB RENESAS-R1QBA3636CBB Datasheet
310Kb / 38P
   36-Mbit DDRII SRAM 2-word Burst
R1QHA3636CBB RENESAS-R1QHA3636CBB Datasheet
311Kb / 38P
   36-Mbit DDRII SRAM 2-word Burst
R1QBA3636CBB RENESAS-R1QBA3636CBB_15 Datasheet
310Kb / 38P
   36-Mbit DDRII SRAM 2-word Burst
R1QHA3636CBB RENESAS-R1QHA3636CBB_15 Datasheet
311Kb / 38P
   36-Mbit DDRII SRAM 2-word Burst
R1Q5A3636B RENESAS-R1Q5A3636B Datasheet
334Kb / 25P
   36-Mbit DDRII SRAM 4-word Burst
R1Q4A7236ABB RENESAS-R1Q4A7236ABB_15 Datasheet
844Kb / 36P
   72-Mbit DDRII SRAM 2-word Burst
R1QBA7236ABB RENESAS-R1QBA7236ABB_15 Datasheet
895Kb / 39P
   72-Mbit DDRII SRAM 2-word Burst
R1QBA7236ABG RENESAS-R1QBA7236ABG_15 Datasheet
892Kb / 39P
   72-Mbit DDRII SRAM 2-word Burst
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com