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PD46364362BF1-E40Y-EQ1 Datasheet(PDF) 11 Page - Renesas Technology Corp

Part # PD46364362BF1-E40Y-EQ1
Description  36M-BIT DDR II SRAM 2-WORD BURST OPERATION
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

PD46364362BF1-E40Y-EQ1 Datasheet(HTML) 11 Page - Renesas Technology Corp

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μPD46364092B, μPD46364182B, μPD46364362B
R10DS0091EJ0400 Rev.4.00
Page 11 of 35
Nov 09, 2012
Byte Write Operation
[
μPD46364092B]
Operation
K
K#
BW0#
Write DQ0 to DQ8
L
→ H
−
0
−
L
→ H
0
Write nothing
L
→ H
−
1
−
L
→ H
1
Remarks 1. H : HIGH, L : LOW,
→ : rising edge.
2. Assumes a WRITE cycle was initiated. BW0# can be altered for any portion of the BURST WRITE
operation provided that the setup and hold requirements are satisfied.
[
μPD46364182B]
Operation
K
K#
BW0#
BW1#
Write DQ0 to DQ17
L
→ H
−
0
0
−
L
→ H
0
0
Write DQ0 to DQ8
L
→ H
−
0
1
−
L
→ H
0
1
Write DQ9 to DQ17
L
→ H
−
1
0
−
L
→ H
1
0
Write nothing
L
→ H
−
1
1
−
L
→ H
1
1
Remarks 1. H : HIGH, L : LOW,
→ : rising edge.
2. Assumes a WRITE cycle was initiated. BW0# and BW1# can be altered for any portion of the BURST
WRITE operation provided that the setup and hold requirements are satisfied.
[
μPD46364362B]
Operation
K
K#
BW0#
BW1#
BW2#
BW3#
Write DQ0 to DQ35
L
→ H
−
0
0
0
0
−
L
→ H
0
0
0
0
Write DQ0 to DQ8
L
→ H
−
0
1
1
1
−
L
→ H
0
1
1
1
Write DQ9 to DQ17
L
→ H
−
1
0
1
1
−
L
→ H
1
0
1
1
Write DQ18 to DQ26
L
→ H
−
1
1
0
1
−
L
→ H
1
1
0
1
Write DQ27 to DQ35
L
→ H
−
1
1
1
0
−
L
→ H
1
1
1
0
Write nothing
L
→ H
−
1
1
1
1
−
L
→ H
1
1
1
1
Remarks 1. H : HIGH, L : LOW,
→ : rising edge.
2. Assumes a WRITE cycle was initiated. BW0# to BW3# can be altered for any portion of the BURST
WRITE operation provided that the setup and hold requirements are satisfied.


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