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AD7278BUJZ-REEL7 Datasheet(PDF) 16 Page - Analog Devices |
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AD7278BUJZ-REEL7 Datasheet(HTML) 16 Page - Analog Devices |
16 / 28 page AD7276/AD7277/AD7278 Rev. C | Page 16 of 28 THEORY OF OPERATION CIRCUIT INFORMATION The AD7276/AD7277/AD7278 are fast, micropower, 12-/10-/ 8-bit, single-supply ADCs, respectively. The parts can be operated from a 2.35 V to 3.6 V supply. When operated from a supply voltage within this range, the AD7276/AD7277/AD7278 are capable of throughput rates of 3 MSPS when provided with a 48 MHz clock. The AD7276/AD7277/AD7278 provide the user with an on- chip track-and-hold ADC and a serial interface housed in a tiny 6-lead TSOT or an 8-lead MSOP package, which offers the user considerable space-saving advantages over alternative solutions. The serial clock input accesses data from the part and provides the clock source for the successive approximation ADC. The analog input range is 0 V to VDD. An external reference is not required for the ADC, and there is no reference on-chip. The reference for the AD7276/AD7277/AD7278 is derived from the power supply, resulting in the widest dynamic input range. The AD7276/AD7277/AD7278 also feature a power-down option to save power between conversions. The power-down feature is implemented across the standard serial interface as described in the Modes of Operation section. CONVERTER OPERATION The AD7276/AD7277/AD7278 are successive approximation ADCs that are based on a charge redistribution DAC. Figure 19 and Figure 20 show simplified schematics of the ADC. Figure 19 shows the ADC during its acquisition phase, where SW2 is closed, SW1 is in Position A, the comparator is held in a balanced con- dition, and the sampling capacitor acquires the signal on VIN. COMPARATOR ACQUISITION PHASE VDD/2 SW2 VIN SAMPLING CAPACITOR AGND A SW1 B CHARGE REDISTRIBUTION DAC CONTROL LOGIC Figure 19. ADC Acquisition Phase When the ADC starts a conversion, SW2 opens and SW1 moves to Position B, causing the comparator to become unbalanced (see Figure 20). The control logic and the charge redistribution DACs are used to add and subtract fixed amounts of charge from the sampling capacitor to bring the comparator back into a balanced condition. When the comparator is rebalanced, the conversion is complete. The control logic generates the ADC output code. COMPARATOR ACQUISITION PHASE VDD/2 SW2 VIN SAMPLING CAPACITOR AGND A SW1 B CHARGE REDISTRIBUTION DAC CONTROL LOGIC Figure 20. ADC Conversion Phase ADC TRANSFER FUNCTION The output coding of the AD7276/AD7277/AD7278 is straight binary. The designed code transitions occur midway between successive integer LSB values, such as 0.5 LSB and 1.5 LSB. The LSB size is VDD/4,096 for the AD7276, VDD/1,024 for the AD7277, and VDD/256 for the AD7278. The ideal transfer characteristic for the AD7276/AD7277/AD7278 is shown in Figure 21. 000...000 0V ANALOG INPUT 111...111 000...001 111...000 011...111 111...110 000...010 1LSB = VREF/4096 (AD7276) 1LSB = VREF/1024 (AD7277) 1LSB = VREF/256 (AD7278) +VDD – 1.5LSB 0.5LSB Figure 21. AD7276/AD7277/AD7278 Transfer Characteristics TYPICAL CONNECTION DIAGRAM Figure 22 shows a typical connection diagram for the AD7276/ AD7277/AD7278. VREF is taken internally from VDD; therefore, VDD should be decoupled. This provides an analog input range of 0 V to VDD. The conversion result is output in a 16-bit word with two leading zeros followed by the 12-bit, 10-bit, or 8-bit result. The 12-bit result from the AD7276 is followed by two trailing zeros; the 10-bit and 8-bit results from the AD7277 and AD7278 are followed by four and six trailing zeros, respectively. Alternatively, because the supply current required by the AD7276/ AD7277/AD7278 is so low, a precision reference can be used as the supply source for the AD7276/AD7277/AD7278. A REF19x voltage reference (REF193 for 3 V) can be used to supply the required voltage to the ADC (see Figure 22). This configuration is especially useful if the power supply is noisy or the system’s supply voltage is a value other than 3 V (for example, 5 V or 15 V). The REF19x outputs a steady voltage to the AD7276/AD7277/AD7278. If the low dropout REF193 is used, it must supply a current of typically 1 mA to the AD7276/AD7277/AD7278. When the ADC is converting at a rate of 3 MSPS, the REF193 must supply a maxi- mum of 5 mA to the AD7276/AD7277/AD7278. |
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