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IS64C1024AL-15TA3 Datasheet(PDF) 1 Page - Integrated Silicon Solution, Inc |
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IS64C1024AL-15TA3 Datasheet(HTML) 1 Page - Integrated Silicon Solution, Inc |
1 / 15 page Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 1 Rev. D 05/09/2012 Copyright©2011IntegratedSiliconSolution,Inc.Allrightsreserved.ISSIreservestherighttomakechangestothisspecificationanditsproductsatanytimewithout notice.ISSIassumesnoliabilityarisingoutoftheapplicationoruseofanyinformation,productsorservicesdescribedherein.Customersareadvisedtoobtainthelatest versionofthisdevicespecificationbeforerelyingonanypublishedinformationandbeforeplacingordersforproducts. IntegratedSiliconSolution,Inc.doesnotrecommendtheuseofanyofitsproductsinlifesupportapplicationswherethefailureormalfunctionoftheproductcanreason- ablybeexpectedtocausefailureofthelifesupportsystemortosignificantlyaffectitssafetyoreffectiveness.Productsarenotauthorizedforuseinsuchapplications unlessIntegratedSiliconSolution,Inc.receiveswrittenassurancetoitssatisfaction,that: a.)theriskofinjuryordamagehasbeenminimized; b.)theuserassumeallsuchrisks;and c.)potentialliabilityofIntegratedSiliconSolution,Incisadequatelyprotectedunderthecircumstances IS61C1024AL IS64C1024AL 128K x 8 HIGH-SPEED CMOS STATIC RAM DESCRIPTION The ISSI IS61C1024AL/IS64C1024AL is a very high- speed, low power, 131,072-word by 8-bit CMOS static RAMs.TheyarefabricatedusingISSI'shigh-performance CMOStechnology.Thishighlyreliableprocesscoupled with innovative circuit design techniques, yields higher performanceandlowpowerconsumptiondevices. WhenCE1isHIGHorCE2isLOW(deselected),thedevice assumesastandbymodeatwhichthepowerdissipation canbereducedbyusingCMOSinputlevels. EasymemoryexpansionisprovidedbyusingtwoChip Enableinputs,CE1andCE2.TheactiveLOWWriteEnable (WE)controlsbothwritingandreadingofthememory. The IS61C1024AL/IS64C1024AL is available in 32-pin 300-milSOJ,32-pin400-milSOJ,32-pinTSOP(TypeI, 8x20),and32-pinsTSOP(TypeI,8x13.4)packages. FUNCTIONAL BLOCK DIAGRAM A0-A16 CE1 OE WE 128K x 8 MEMORY ARRAY DECODER COLUMN I/O CONTROL CIRCUIT GND VDD I/O DATA CIRCUIT I/O0-I/O7 CE2 FEATURES • High-speedaccesstime:12,15ns • Lowactivepower:160mW(typical) • Lowstandbypower:1000µW(typical)CMOS standby • OutputEnable(OE)andtwoChipEnable (CE1andCE2)inputsforeaseinapplications • Fullystaticoperation:noclockorrefresh required • TTLcompatibleinputsandoutputs • Single5V(±10%)powersupply • Commercial,industrial,andautomotivetempera- turerangesavailable • Leadfreeavailable MAY 2012 |
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