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A42MX09-2TQ100B Datasheet(PDF) 66 Page - Microsemi Corporation |
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A42MX09-2TQ100B Datasheet(HTML) 66 Page - Microsemi Corporation |
66 / 142 page 40MX and 42MX FPGA Families 1- 62 R e v i sio n 1 1 TTL Output Module Timing5 tDLH Data-to-Pad HIGH 2.5 2.8 3.2 3.7 5.2 ns tDHL Data-to-Pad LOW 3.0 3.3 3.7 4.4 6.1 ns tENZH Enable Pad Z to HIGH 2.7 3.0 3.4 4.0 5.6 ns tENZL Enable Pad Z to LOW 3.0 3.3 3.8 4.4 6.2 ns tENHZ Enable Pad HIGH to Z 5.4 6.0 6.8 8.0 11.2 ns tENLZ Enable Pad LOW to Z 5.0 5.6 6.3 7.4 10.4 ns tGLH G-to-Pad HIGH 2.9 3.2 3.6 4.3 6.0 ns tGHL G-to-Pad LOW 2.9 3.2 3.6 4.3 6.0 ns tLCO I/O Latch Clock-to-Out (Pad-to-Pad), 64 Clock Loading 5.7 6.3 7.1 8.4 11.9 ns tACO Array Clock-to-Out (Pad-to-Pad), 64 Clock Loading 8.0 8.9 10.1 11.9 16.7 ns dTLH Capacitive Loading, LOW to HIGH 0.03 0.03 0.03 0.04 0.06 ns/pF dTHL Capacitive Loading, HIGH to LOW 0.04 0.04 0.04 0.05 0.07 ns/pF Table 1-34 • A42MX16 Timing Characteristics (Nominal 5.0 V Operation) (continued) (Worst-Case Commercial Conditions, VCCA = 4.75 V, TJ = 70°C) –3 Speed –2 Speed –1 Speed Std Speed –F Speed Units Parameter / Description Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Notes: 1. For dual-module macros, use tPD1 + tRD1 + tPDn, tCO + tRD1 + tPDn, or tPD1 + tRD1 + tSUD, point and position whichever is appropriate. 2. Routing delays are for typical designs across worst-case operating conditions. These parameters should be used for estimating device performance. Post-route timing analysis or simulation is required to determine actual performance. 3. Data applies to macros based on the S-module. Timing parameters for sequential macros constructed from C-modules can be obtained from the Timer utility. 4. Set-up and hold timing parameters for the input buffer latch are defined with respect to the PAD and the D input. External setup/hold timing parameters must account for delay from an external PAD signal to the G inputs. Delay from an external PAD signal to the G input subtracts (adds) to the internal setup (hold) time. 5. Delays based on 35 pF loading. |
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